target/linux/ramips/patches-3.8/0105-MIPS-extend-RT3050-dtsi-file.patch

   1 From 45e797ec7555c50775d9ac7fc7a17a544344aa3f Mon Sep 17 00:00:00 2001
   2 From: John Crispin <blogic@openwrt.org>
   3 Date: Thu, 21 Mar 2013 17:47:07 +0100
   4 Subject: [PATCH 105/121] MIPS: extend RT3050 dtsi file
   5
   6 Add some additional properties to the dtsi file for ethernet and wifi.
   7
   8 Signed-off-by: John Crispin <blogic@openwrt.org>
   9 ---
  10  arch/mips/ralink/dts/rt3050.dtsi |   96 ++++++++++++++++++++++++++++++++------
  11  1 file changed, 81 insertions(+), 15 deletions(-)
  12
  13 diff --git a/arch/mips/ralink/dts/rt3050.dtsi b/arch/mips/ralink/dts/rt3050.dtsi
  14 index 069d066..5aede8d 100644
  15 --- a/arch/mips/ralink/dts/rt3050.dtsi
  16 +++ b/arch/mips/ralink/dts/rt3050.dtsi
  17 @@ -1,7 +1,7 @@
  18  / {
  19         #address-cells = <1>;
  20         #size-cells = <1>;
  21 -       compatible = "ralink,rt3050-soc", "ralink,rt3052-soc";
  22 +       compatible = "ralink,rt3050-soc", "ralink,rt3052-soc", "ralink,rt3350-soc";
  23
  24         cpus {
  25                 cpu@0 {
  26 @@ -23,7 +23,7 @@
  27         palmbus@10000000 {
  28                 compatible = "palmbus";
  29                 reg = <0x10000000 0x200000>;
  30 -                ranges = <0x0 0x10000000 0x1FFFFF>;
  31 +               ranges = <0x0 0x10000000 0x1FFFFF>;
  32
  33                 #address-cells = <1>;
  34                 #size-cells = <1>;
  35 @@ -34,8 +34,18 @@
  36                 };
  37
  38                 timer@100 {
  39 +                       compatible = "ralink,rt3052-timer", "ralink,rt2880-timer";
  40 +                       reg = <0x100 0x20>;
  41 +
  42 +                       interrupt-parent = <&intc>;
  43 +                       interrupts = <1>;
  44 +
  45 +                       status = "disabled";
  46 +               };
  47 +
  48 +               watchdog@120 {
  49                         compatible = "ralink,rt3052-wdt", "ralink,rt2880-wdt";
  50 -                       reg = <0x100 0x100>;
  51 +                       reg = <0x120 0x10>;
  52                 };
  53
  54                 intc: intc@200 {
  55 @@ -61,10 +71,12 @@
  56                         gpio-controller;
  57                         #gpio-cells = <2>;
  58
  59 -                       ralink,ngpio = <24>;
  60 -                       ralink,regs = [ 00 04 08 0c
  61 -                                       20 24 28 2c
  62 -                                       30 34 ];
  63 +                       ralink,num-gpios = <24>;
  64 +                       ralink,register-map = [ 00 04 08 0c
  65 +                                               20 24 28 2c
  66 +                                               30 34 ];
  67 +
  68 +                       status = "disabled";
  69                 };
  70
  71                 gpio1: gpio@638 {
  72 @@ -74,10 +86,12 @@
  73                         gpio-controller;
  74                         #gpio-cells = <2>;
  75
  76 -                       ralink,ngpio = <16>;
  77 -                       ralink,regs = [ 00 04 08 0c
  78 -                                       10 14 18 1c
  79 -                                       20 24 ];
  80 +                       ralink,num-gpios = <16>;
  81 +                       ralink,register-map = [ 00 04 08 0c
  82 +                                               10 14 18 1c
  83 +                                               20 24 ];
  84 +
  85 +                       status = "disabled";
  86                 };
  87
  88                 gpio2: gpio@660 {
  89 @@ -87,10 +101,21 @@
  90                         gpio-controller;
  91                         #gpio-cells = <2>;
  92
  93 -                       ralink,ngpio = <12>;
  94 -                       ralink,regs = [ 00 04 08 0c
  95 -                                       10 14 18 1c
  96 -                                       20 24 ];
  97 +                       ralink,num-gpios = <12>;
  98 +                       ralink,register-map = [ 00 04 08 0c
  99 +                                               10 14 18 1c
 100 +                                               20 24 ];
 101 +
 102 +                       status = "disabled";
 103 +               };
 104 +
 105 +               spi@b00 {
 106 +                       compatible = "ralink,rt3050-spi", "ralink,rt2880-spi";
 107 +                       reg = <0xb00 0x100>;
 108 +                       #address-cells = <1>;
 109 +                       #size-cells = <0>;
 110 +
 111 +                       status = "disabled";
 112                 };
 113
 114                 uartlite@c00 {
 115 @@ -102,5 +127,46 @@
 116
 117                         reg-shift = <2>;
 118                 };
 119 +
 120 +       };
 121 +
 122 +       ethernet@10100000 {
 123 +               compatible = "ralink,rt3050-eth";
 124 +               reg = <0x10100000 10000>;
 125 +
 126 +               interrupt-parent = <&cpuintc>;
 127 +               interrupts = <5>;
 128 +
 129 +               status = "disabled";
 130 +       };
 131 +
 132 +       esw@10110000 {
 133 +               compatible = "ralink,rt3050-esw";
 134 +               reg = <0x10110000 8000>;
 135 +
 136 +               interrupt-parent = <&intc>;
 137 +               interrupts = <17>;
 138 +
 139 +               status = "disabled";
 140 +       };
 141 +
 142 +       wmac@10180000 {
 143 +               compatible = "ralink,rt3050-wmac", "ralink,rt2880-wmac";
 144 +               reg = <0x10180000 40000>;
 145 +
 146 +               interrupt-parent = <&cpuintc>;
 147 +               interrupts = <6>;
 148 +
 149 +               status = "disabled";
 150 +       };
 151 +
 152 +       otg@101c0000 {
 153 +               compatible = "ralink,rt3050-otg";
 154 +               reg = <0x101c0000 40000>;
 155 +
 156 +               interrupt-parent = <&intc>;
 157 +               interrupts = <18>;
 158 +
 159 +               status = "disabled";
 160         };
 161  };
 162 --
 163 1.7.10.4
 164