ramips: aw9523: add can_sleep flag for GPIO chip
[openwrt/staging/jow.git] / target / linux / ramips / files / drivers / pinctrl / pinctrl-aw9523.c
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Awinic AW9523B i2c pin controller driver
4 * Copyright (c) 2020, AngeloGioacchino Del Regno
5 * <angelogioacchino.delregno@somainline.org>
6 */
7
8 #include <linux/bitfield.h>
9 #include <linux/regmap.h>
10 #include <linux/i2c.h>
11 #include <linux/init.h>
12 #include <linux/interrupt.h>
13 #include <linux/irq.h>
14 #include <linux/mutex.h>
15 #include <linux/module.h>
16 #include <linux/slab.h>
17 #include <linux/of.h>
18 #include <linux/of_device.h>
19 #include <linux/version.h>
20 #include <linux/gpio/consumer.h>
21 #include <linux/gpio/driver.h>
22 #include <linux/pinctrl/pinconf.h>
23 #include <linux/pinctrl/pinctrl.h>
24 #include <linux/pinctrl/pinmux.h>
25 #include <linux/pinctrl/pinconf-generic.h>
26 #include <linux/regulator/consumer.h>
27
28 #include "core.h"
29 #include "pinconf.h"
30 #include "pinctrl-utils.h"
31
32 #define AW9523_MAX_FUNCS 2
33 #define AW9523_NUM_PORTS 2
34 #define AW9523_PINS_PER_PORT 8
35
36 /*
37 * HW needs at least 20uS for reset and at least 1-2uS to recover from
38 * reset, but we have to account for eventual board quirks, if any:
39 * for this reason, keep reset asserted for 50uS and wait for 20uS
40 * to recover from the reset.
41 */
42 #define AW9523_HW_RESET_US 50
43 #define AW9523_HW_RESET_RECOVERY_US 20
44
45 /* Port 0: P0_0...P0_7 - Port 1: P1_0...P1_7 */
46 #define AW9523_PIN_TO_PORT(pin) (pin >> 3)
47 #define AW9523_REG_IN_STATE(pin) (0x00 + AW9523_PIN_TO_PORT(pin))
48 #define AW9523_REG_OUT_STATE(pin) (0x02 + AW9523_PIN_TO_PORT(pin))
49 #define AW9523_REG_CONF_STATE(pin) (0x04 + AW9523_PIN_TO_PORT(pin))
50 #define AW9523_REG_INTR_DIS(pin) (0x06 + AW9523_PIN_TO_PORT(pin))
51 #define AW9523_REG_CHIPID 0x10
52 #define AW9523_VAL_EXPECTED_CHIPID 0x23
53
54 #define AW9523_REG_GCR 0x11
55 #define AW9523_GCR_ISEL_MASK GENMASK(0, 1)
56 #define AW9523_GCR_GPOMD_MASK BIT(4)
57
58 #define AW9523_REG_PORT_MODE(pin) (0x12 + AW9523_PIN_TO_PORT(pin))
59 #define AW9523_REG_SOFT_RESET 0x7f
60 #define AW9523_VAL_RESET 0x00
61
62 /*
63 * struct aw9523_irq - Interrupt controller structure
64 * @lock: mutex locking for the irq bus
65 * @irqchip: structure holding irqchip params
66 * @cached_gpio: stores the previous gpio status for bit comparison
67 */
68 struct aw9523_irq {
69 struct mutex lock;
70 struct irq_chip *irqchip;
71 u16 cached_gpio;
72 };
73
74 /*
75 * struct aw9523_pinmux - Pin mux params
76 * @name: Name of the mux
77 * @grps: Groups of the mux
78 * @num_grps: Number of groups (sizeof array grps)
79 */
80 struct aw9523_pinmux {
81 const char *name;
82 const char * const *grps;
83 const u8 num_grps;
84 };
85
86 /*
87 * struct aw9523 - Main driver structure
88 * @dev: device handle
89 * @regmap: regmap handle for current device
90 * @i2c_lock: Mutex lock for i2c operations
91 * @reset_gpio: Hardware reset (RSTN) signal GPIO
92 * @vio_vreg: VCC regulator (Optional)
93 * @pctl: pinctrl handle for current device
94 * @gpio: structure holding gpiochip params
95 * @irq: Interrupt controller structure
96 */
97 struct aw9523 {
98 struct device *dev;
99 struct regmap *regmap;
100 struct mutex i2c_lock;
101 struct gpio_desc *reset_gpio;
102 struct regulator *vio_vreg;
103 struct pinctrl_dev *pctl;
104 struct gpio_chip gpio;
105 struct aw9523_irq *irq;
106 };
107
108 static const struct pinctrl_pin_desc aw9523_pins[] = {
109 /* Port 0 */
110 PINCTRL_PIN(0, "gpio0"),
111 PINCTRL_PIN(1, "gpio1"),
112 PINCTRL_PIN(2, "gpio2"),
113 PINCTRL_PIN(3, "gpio3"),
114 PINCTRL_PIN(4, "gpio4"),
115 PINCTRL_PIN(5, "gpio5"),
116 PINCTRL_PIN(6, "gpio6"),
117 PINCTRL_PIN(7, "gpio7"),
118
119 /* Port 1 */
120 PINCTRL_PIN(8, "gpio8"),
121 PINCTRL_PIN(9, "gpio9"),
122 PINCTRL_PIN(10, "gpio10"),
123 PINCTRL_PIN(11, "gpio11"),
124 PINCTRL_PIN(12, "gpio12"),
125 PINCTRL_PIN(13, "gpio13"),
126 PINCTRL_PIN(14, "gpio14"),
127 PINCTRL_PIN(15, "gpio15"),
128 };
129
130 static int aw9523_pinctrl_get_groups_count(struct pinctrl_dev *pctldev)
131 {
132 return ARRAY_SIZE(aw9523_pins);
133 }
134
135 static const char *aw9523_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
136 unsigned int selector)
137 {
138 return aw9523_pins[selector].name;
139 }
140
141 static int aw9523_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
142 unsigned int selector,
143 const unsigned int **pins,
144 unsigned int *num_pins)
145 {
146 *pins = &aw9523_pins[selector].number;
147 *num_pins = 1;
148 return 0;
149 }
150
151 static const struct pinctrl_ops aw9523_pinctrl_ops = {
152 .get_groups_count = aw9523_pinctrl_get_groups_count,
153 .get_group_pins = aw9523_pinctrl_get_group_pins,
154 .get_group_name = aw9523_pinctrl_get_group_name,
155 .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
156 .dt_free_map = pinconf_generic_dt_free_map,
157 };
158
159 static const char * const gpio_pwm_groups[] = {
160 "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5",
161 "gpio6", "gpio7", "gpio8", "gpio9", "gpio10", "gpio11",
162 "gpio12", "gpio13", "gpio14", "gpio15"
163 };
164
165 /* Warning: Do NOT reorder this array */
166 static const struct aw9523_pinmux aw9523_pmx[] = {
167 {
168 .name = "pwm",
169 .grps = gpio_pwm_groups,
170 .num_grps = ARRAY_SIZE(gpio_pwm_groups),
171 },
172 {
173 .name = "gpio",
174 .grps = gpio_pwm_groups,
175 .num_grps = ARRAY_SIZE(gpio_pwm_groups),
176 },
177 };
178
179 static int aw9523_pmx_get_funcs_count(struct pinctrl_dev *pctl)
180 {
181 return ARRAY_SIZE(aw9523_pmx);
182 }
183
184 static const char *aw9523_pmx_get_fname(struct pinctrl_dev *pctl,
185 unsigned int sel)
186 {
187 return aw9523_pmx[sel].name;
188 }
189
190 static int aw9523_pmx_get_groups(struct pinctrl_dev *pctl, unsigned int sel,
191 const char * const **groups,
192 unsigned int * const num_groups)
193 {
194 *groups = aw9523_pmx[sel].grps;
195 *num_groups = aw9523_pmx[sel].num_grps;
196 return 0;
197 }
198
199 static int aw9523_pmx_set_mux(struct pinctrl_dev *pctl, unsigned int fsel,
200 unsigned int grp)
201 {
202 struct aw9523 *awi = pinctrl_dev_get_drvdata(pctl);
203 int ret, pin = aw9523_pins[grp].number % AW9523_PINS_PER_PORT;
204
205 if (fsel >= ARRAY_SIZE(aw9523_pmx))
206 return -EINVAL;
207
208 /*
209 * This maps directly to the aw9523_pmx array: programming a
210 * high bit means "gpio" and a low bit means "pwm".
211 */
212 mutex_lock(&awi->i2c_lock);
213 ret = regmap_update_bits(awi->regmap, AW9523_REG_PORT_MODE(pin),
214 BIT(pin), (fsel ? BIT(pin) : 0));
215 mutex_unlock(&awi->i2c_lock);
216 return ret;
217 }
218
219 static const struct pinmux_ops aw9523_pinmux_ops = {
220 .get_functions_count = aw9523_pmx_get_funcs_count,
221 .get_function_name = aw9523_pmx_get_fname,
222 .get_function_groups = aw9523_pmx_get_groups,
223 .set_mux = aw9523_pmx_set_mux,
224 };
225
226 static int aw9523_pcfg_param_to_reg(enum pin_config_param pcp, int pin, u8 *r)
227 {
228 u8 reg;
229
230 switch (pcp) {
231 case PIN_CONFIG_BIAS_PULL_PIN_DEFAULT:
232 case PIN_CONFIG_BIAS_PULL_DOWN:
233 case PIN_CONFIG_BIAS_PULL_UP:
234 reg = AW9523_REG_IN_STATE(pin);
235 break;
236 case PIN_CONFIG_DRIVE_OPEN_DRAIN:
237 case PIN_CONFIG_DRIVE_PUSH_PULL:
238 reg = AW9523_REG_GCR;
239 break;
240 case PIN_CONFIG_INPUT_ENABLE:
241 case PIN_CONFIG_OUTPUT_ENABLE:
242 reg = AW9523_REG_CONF_STATE(pin);
243 break;
244 case PIN_CONFIG_OUTPUT:
245 reg = AW9523_REG_OUT_STATE(pin);
246 break;
247 default:
248 return -ENOTSUPP;
249 }
250 *r = reg;
251
252 return 0;
253 }
254
255 static int aw9523_pconf_get(struct pinctrl_dev *pctldev, unsigned int pin,
256 unsigned long *config)
257 {
258 struct aw9523 *awi = pinctrl_dev_get_drvdata(pctldev);
259 enum pin_config_param param = pinconf_to_config_param(*config);
260 int regbit = pin % AW9523_PINS_PER_PORT;
261 unsigned int val;
262 u8 reg;
263 int rc;
264
265 rc = aw9523_pcfg_param_to_reg(param, pin, &reg);
266 if (rc)
267 return rc;
268
269 mutex_lock(&awi->i2c_lock);
270 rc = regmap_read(awi->regmap, reg, &val);
271 mutex_unlock(&awi->i2c_lock);
272 if (rc)
273 return rc;
274
275 switch (param) {
276 case PIN_CONFIG_BIAS_PULL_UP:
277 case PIN_CONFIG_INPUT_ENABLE:
278 case PIN_CONFIG_OUTPUT:
279 val &= BIT(regbit);
280 break;
281 case PIN_CONFIG_BIAS_PULL_DOWN:
282 case PIN_CONFIG_OUTPUT_ENABLE:
283 val &= BIT(regbit);
284 val = !val;
285 break;
286 case PIN_CONFIG_DRIVE_OPEN_DRAIN:
287 if (pin >= AW9523_PINS_PER_PORT)
288 val = 0;
289 else
290 val = !FIELD_GET(AW9523_GCR_GPOMD_MASK, val);
291 break;
292 case PIN_CONFIG_DRIVE_PUSH_PULL:
293 if (pin >= AW9523_PINS_PER_PORT)
294 val = 1;
295 else
296 val = FIELD_GET(AW9523_GCR_GPOMD_MASK, val);
297 break;
298 default:
299 return -ENOTSUPP;
300 }
301 if (val < 1)
302 return -EINVAL;
303
304 *config = pinconf_to_config_packed(param, !!val);
305
306 return rc;
307 }
308
309 static int aw9523_pconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
310 unsigned long *configs, unsigned int num_configs)
311 {
312 struct aw9523 *awi = pinctrl_dev_get_drvdata(pctldev);
313 enum pin_config_param param;
314 int regbit = pin % AW9523_PINS_PER_PORT;
315 u32 arg;
316 u8 reg;
317 unsigned int mask, val;
318 int i, rc;
319
320 mutex_lock(&awi->i2c_lock);
321 for (i = 0; i < num_configs; i++) {
322 param = pinconf_to_config_param(configs[i]);
323 arg = pinconf_to_config_argument(configs[i]);
324
325 rc = aw9523_pcfg_param_to_reg(param, pin, &reg);
326 if (rc)
327 goto end;
328
329 switch (param) {
330 case PIN_CONFIG_OUTPUT:
331 /* First, enable pin output */
332 rc = regmap_update_bits(awi->regmap,
333 AW9523_REG_CONF_STATE(pin),
334 BIT(regbit), 0);
335 if (rc)
336 goto end;
337
338 /* Then, fall through to config output level */
339 fallthrough;
340 case PIN_CONFIG_OUTPUT_ENABLE:
341 arg = !arg;
342 fallthrough;
343 case PIN_CONFIG_BIAS_PULL_PIN_DEFAULT:
344 case PIN_CONFIG_BIAS_PULL_DOWN:
345 case PIN_CONFIG_BIAS_PULL_UP:
346 case PIN_CONFIG_INPUT_ENABLE:
347 mask = BIT(regbit);
348 val = arg ? BIT(regbit) : 0;
349 break;
350 case PIN_CONFIG_DRIVE_OPEN_DRAIN:
351 /* Open-Drain is supported only on port 0 */
352 if (pin >= AW9523_PINS_PER_PORT) {
353 rc = -ENOTSUPP;
354 goto end;
355 }
356 mask = AW9523_GCR_GPOMD_MASK;
357 val = 0;
358 break;
359 case PIN_CONFIG_DRIVE_PUSH_PULL:
360 /* Port 1 is always Push-Pull */
361 if (pin >= AW9523_PINS_PER_PORT) {
362 mask = 0;
363 val = 0;
364 continue;
365 }
366 mask = AW9523_GCR_GPOMD_MASK;
367 val = AW9523_GCR_GPOMD_MASK;
368 break;
369 default:
370 rc = -ENOTSUPP;
371 goto end;
372 }
373
374 rc = regmap_update_bits(awi->regmap, reg, mask, val);
375 if (rc)
376 goto end;
377 }
378 end:
379 mutex_unlock(&awi->i2c_lock);
380 return rc;
381 }
382
383 static const struct pinconf_ops aw9523_pinconf_ops = {
384 .pin_config_get = aw9523_pconf_get,
385 .pin_config_set = aw9523_pconf_set,
386 .is_generic = true,
387 };
388
389 #if LINUX_VERSION_CODE <= KERNEL_VERSION(5, 5, 0)
390 #define GPIO_LINE_DIRECTION_IN 1
391 #define GPIO_LINE_DIRECTION_OUT 0
392 #endif
393
394 /*
395 * aw9523_get_pin_direction - Get pin direction
396 * @regmap: Regmap structure
397 * @pin: gpiolib pin number
398 * @n: pin index in port register
399 *
400 * Return: Pin direction for success or negative number for error
401 */
402 static int aw9523_get_pin_direction(struct regmap *regmap, u8 pin, u8 n)
403 {
404 int val, ret;
405
406 ret = regmap_read(regmap, AW9523_REG_CONF_STATE(pin), &val);
407 if (ret < 0)
408 return ret;
409
410 return (val & BIT(n)) == BIT(n);
411 }
412
413 /*
414 * aw9523_get_port_state - Get input or output state for entire port
415 * @regmap: Regmap structure
416 * @pin: gpiolib pin number
417 * @regbit: hw pin index, used to retrieve port number
418 * @state: returned port state
419 *
420 * Return: Zero for success or negative number for error
421 */
422 static int aw9523_get_port_state(struct regmap *regmap, u8 pin,
423 u8 regbit, unsigned int *state)
424 {
425 u8 reg;
426 int dir;
427
428 dir = aw9523_get_pin_direction(regmap, pin, regbit);
429 if (dir < 0)
430 return dir;
431
432 if (dir == GPIO_LINE_DIRECTION_IN)
433 reg = AW9523_REG_IN_STATE(pin);
434 else
435 reg = AW9523_REG_OUT_STATE(pin);
436
437 return regmap_read(regmap, reg, state);
438 }
439
440 #if LINUX_VERSION_CODE <= KERNEL_VERSION(5, 5, 0)
441 #undef GPIO_LINE_DIRECTION_IN
442 #undef GPIO_LINE_DIRECTION_OUT
443 #endif
444
445 static int aw9523_gpio_irq_type(struct irq_data *d, unsigned int type)
446 {
447 switch (type) {
448 case IRQ_TYPE_NONE:
449 case IRQ_TYPE_EDGE_BOTH:
450 return 0;
451 default:
452 return -EINVAL;
453 };
454 }
455
456 /*
457 * aw9523_irq_mask - Mask interrupt
458 * @d: irq data
459 *
460 * Sets which interrupt to mask in the bitmap;
461 * The interrupt will be masked when unlocking the irq bus.
462 */
463 static void aw9523_irq_mask(struct irq_data *d)
464 {
465 struct aw9523 *awi = gpiochip_get_data(irq_data_get_irq_chip_data(d));
466 unsigned int n = d->hwirq % AW9523_PINS_PER_PORT;
467
468 regmap_update_bits(awi->regmap,
469 AW9523_REG_INTR_DIS(d->hwirq),
470 BIT(n), BIT(n));
471 }
472
473 /*
474 * aw9523_irq_unmask - Unmask interrupt
475 * @d: irq data
476 *
477 * Sets which interrupt to unmask in the bitmap;
478 * The interrupt will be masked when unlocking the irq bus.
479 */
480 static void aw9523_irq_unmask(struct irq_data *d)
481 {
482 struct aw9523 *awi = gpiochip_get_data(irq_data_get_irq_chip_data(d));
483 unsigned int n = d->hwirq % AW9523_PINS_PER_PORT;
484
485 regmap_update_bits(awi->regmap,
486 AW9523_REG_INTR_DIS(d->hwirq),
487 BIT(n), 0);
488 }
489
490 static irqreturn_t aw9523_irq_thread_func(int irq, void *dev_id)
491 {
492 struct aw9523 *awi = (struct aw9523 *)dev_id;
493 unsigned long n, val = 0;
494 unsigned long changed_gpio;
495 unsigned int tmp, port_pin, i, ret;
496
497 for (i = 0; i < AW9523_NUM_PORTS; i++) {
498 port_pin = i * AW9523_PINS_PER_PORT;
499 ret = regmap_read(awi->regmap,
500 AW9523_REG_IN_STATE(port_pin),
501 &tmp);
502 if (ret)
503 return ret;
504 val |= (u8)tmp << (i * 8);
505 }
506
507 /* Handle GPIO input release interrupt as well */
508 changed_gpio = awi->irq->cached_gpio ^ val;
509 awi->irq->cached_gpio = val;
510
511 /*
512 * To avoid up to four *slow* i2c reads from any driver hooked
513 * up to our interrupts, just check for the irq_find_mapping
514 * result: if the interrupt is not mapped, then we don't want
515 * to care about it.
516 */
517 for_each_set_bit(n, &changed_gpio, awi->gpio.ngpio) {
518 tmp = irq_find_mapping(awi->gpio.irq.domain, n);
519 if (tmp <= 0)
520 continue;
521 handle_nested_irq(tmp);
522 }
523
524 return IRQ_HANDLED;
525 }
526
527 /*
528 * aw9523_irq_bus_lock - Grab lock for interrupt operation
529 * @d: irq data
530 */
531 static void aw9523_irq_bus_lock(struct irq_data *d)
532 {
533 struct aw9523 *awi = gpiochip_get_data(irq_data_get_irq_chip_data(d));
534
535 mutex_lock(&awi->irq->lock);
536 regcache_cache_only(awi->regmap, true);
537 }
538
539 /*
540 * aw9523_irq_bus_sync_unlock - Synchronize state and unlock
541 * @d: irq data
542 *
543 * Writes the interrupt mask bits (found in the bit map) to the
544 * hardware, then unlocks the bus.
545 */
546 static void aw9523_irq_bus_sync_unlock(struct irq_data *d)
547 {
548 struct aw9523 *awi = gpiochip_get_data(irq_data_get_irq_chip_data(d));
549
550 regcache_cache_only(awi->regmap, false);
551 regcache_sync(awi->regmap);
552 mutex_unlock(&awi->irq->lock);
553 }
554
555 static int aw9523_gpio_get_direction(struct gpio_chip *chip,
556 unsigned int offset)
557 {
558 struct aw9523 *awi = gpiochip_get_data(chip);
559 u8 regbit = offset % AW9523_PINS_PER_PORT;
560 int ret;
561
562 mutex_lock(&awi->i2c_lock);
563 ret = aw9523_get_pin_direction(awi->regmap, offset, regbit);
564 mutex_unlock(&awi->i2c_lock);
565
566 return ret;
567 }
568
569 static int aw9523_gpio_get(struct gpio_chip *chip, unsigned int offset)
570 {
571 struct aw9523 *awi = gpiochip_get_data(chip);
572 u8 regbit = offset % AW9523_PINS_PER_PORT;
573 unsigned int val;
574 int ret;
575
576 mutex_lock(&awi->i2c_lock);
577 ret = aw9523_get_port_state(awi->regmap, offset, regbit, &val);
578 mutex_unlock(&awi->i2c_lock);
579 if (ret)
580 return ret;
581
582 return !!(val & BIT(regbit));
583 }
584
585 /**
586 * _aw9523_gpio_get_multiple - Get I/O state for an entire port
587 * @regmap: Regmap structure
588 * @pin: gpiolib pin number
589 * @regbit: hw pin index, used to retrieve port number
590 * @state: returned port I/O state
591 *
592 * Return: Zero for success or negative number for error
593 */
594 static int _aw9523_gpio_get_multiple(struct aw9523 *awi, u8 regbit,
595 u8 *state, u8 mask)
596 {
597 u32 dir_in, val;
598 u8 m;
599 int ret;
600
601 /* Registers are 8-bits wide */
602 ret = regmap_read(awi->regmap, AW9523_REG_CONF_STATE(regbit), &dir_in);
603 if (ret)
604 return ret;
605 *state = 0;
606
607 m = mask & dir_in;
608 if (m) {
609 ret = regmap_read(awi->regmap, AW9523_REG_IN_STATE(regbit),
610 &val);
611 if (ret)
612 return ret;
613 *state |= (u8)val & m;
614 }
615
616 m = mask & ~dir_in;
617 if (m) {
618 ret = regmap_read(awi->regmap, AW9523_REG_OUT_STATE(regbit),
619 &val);
620 if (ret)
621 return ret;
622 *state |= (u8)val & m;
623 }
624
625 return 0;
626 }
627
628 static int aw9523_gpio_get_multiple(struct gpio_chip *chip,
629 unsigned long *mask,
630 unsigned long *bits)
631 {
632 struct aw9523 *awi = gpiochip_get_data(chip);
633 u8 m, state = 0;
634 int ret;
635
636 mutex_lock(&awi->i2c_lock);
637
638 /* Port 0 (gpio 0-7) */
639 m = *mask & U8_MAX;
640 if (m) {
641 ret = _aw9523_gpio_get_multiple(awi, 0, &state, m);
642 if (ret)
643 goto out;
644 }
645 *bits = state;
646
647 /* Port 1 (gpio 8-15) */
648 m = (*mask >> 8) & U8_MAX;
649 if (m) {
650 ret = _aw9523_gpio_get_multiple(awi, AW9523_PINS_PER_PORT,
651 &state, m);
652 if (ret)
653 goto out;
654
655 *bits |= (state << 8);
656 }
657 out:
658 mutex_unlock(&awi->i2c_lock);
659 return ret;
660 }
661
662 static void aw9523_gpio_set_multiple(struct gpio_chip *chip,
663 unsigned long *mask,
664 unsigned long *bits)
665 {
666 struct aw9523 *awi = gpiochip_get_data(chip);
667 u8 mask_lo, mask_hi, bits_lo, bits_hi;
668 unsigned int reg;
669 int ret = 0;
670
671 mask_lo = *mask & U8_MAX;
672 mask_hi = (*mask >> 8) & U8_MAX;
673 mutex_lock(&awi->i2c_lock);
674 if (mask_hi) {
675 reg = AW9523_REG_OUT_STATE(AW9523_PINS_PER_PORT);
676 bits_hi = (*bits >> 8) & U8_MAX;
677
678 ret = regmap_write_bits(awi->regmap, reg, mask_hi, bits_hi);
679 if (ret) {
680 dev_warn(awi->dev, "Cannot write port1 out level\n");
681 goto out;
682 }
683 }
684 if (mask_lo) {
685 reg = AW9523_REG_OUT_STATE(0);
686 bits_lo = *bits & U8_MAX;
687 ret = regmap_write_bits(awi->regmap, reg, mask_lo, bits_lo);
688 if (ret)
689 dev_warn(awi->dev, "Cannot write port0 out level\n");
690 }
691 out:
692 mutex_unlock(&awi->i2c_lock);
693 }
694
695 static void aw9523_gpio_set(struct gpio_chip *chip,
696 unsigned int offset, int value)
697 {
698 struct aw9523 *awi = gpiochip_get_data(chip);
699 u8 regbit = offset % AW9523_PINS_PER_PORT;
700
701 mutex_lock(&awi->i2c_lock);
702 regmap_update_bits(awi->regmap, AW9523_REG_OUT_STATE(offset),
703 BIT(regbit), value ? BIT(regbit) : 0);
704 mutex_unlock(&awi->i2c_lock);
705 }
706
707
708 static int aw9523_direction_input(struct gpio_chip *chip, unsigned int offset)
709 {
710 struct aw9523 *awi = gpiochip_get_data(chip);
711 u8 regbit = offset % AW9523_PINS_PER_PORT;
712 int ret;
713
714 mutex_lock(&awi->i2c_lock);
715 ret = regmap_update_bits(awi->regmap, AW9523_REG_CONF_STATE(offset),
716 BIT(regbit), BIT(regbit));
717 mutex_unlock(&awi->i2c_lock);
718
719 return ret;
720 }
721
722 static int aw9523_direction_output(struct gpio_chip *chip,
723 unsigned int offset, int value)
724 {
725 struct aw9523 *awi = gpiochip_get_data(chip);
726 u8 regbit = offset % AW9523_PINS_PER_PORT;
727 int ret;
728
729 mutex_lock(&awi->i2c_lock);
730 ret = regmap_update_bits(awi->regmap, AW9523_REG_OUT_STATE(offset),
731 BIT(regbit), value ? BIT(regbit) : 0);
732 if (ret)
733 goto end;
734
735 ret = regmap_update_bits(awi->regmap, AW9523_REG_CONF_STATE(offset),
736 BIT(regbit), 0);
737 end:
738 mutex_unlock(&awi->i2c_lock);
739 return ret;
740 }
741
742 static int aw9523_drive_reset_gpio(struct aw9523 *awi)
743 {
744 unsigned int chip_id;
745 int ret;
746
747 /*
748 * If the chip is already configured for any reason, then we
749 * will probably succeed in sending the soft reset signal to
750 * the hardware through I2C: this operation takes less time
751 * compared to a full HW reset and it gives the same results.
752 */
753 ret = regmap_write(awi->regmap, AW9523_REG_SOFT_RESET, 0);
754 if (ret == 0)
755 goto done;
756
757 dev_dbg(awi->dev, "Cannot execute soft reset: trying hard reset\n");
758 ret = gpiod_direction_output(awi->reset_gpio, 0);
759 if (ret)
760 return ret;
761
762 /* The reset pulse has to be longer than 20uS due to deglitch */
763 usleep_range(AW9523_HW_RESET_US, AW9523_HW_RESET_US + 1);
764
765 ret = gpiod_direction_output(awi->reset_gpio, 1);
766 if (ret)
767 return ret;
768 done:
769 /* The HW needs at least 1uS to reliably recover after reset */
770 usleep_range(AW9523_HW_RESET_RECOVERY_US,
771 AW9523_HW_RESET_RECOVERY_US + 1);
772
773 /* Check the ChipID */
774 ret = regmap_read(awi->regmap, AW9523_REG_CHIPID, &chip_id);
775 if (ret) {
776 dev_err(awi->dev, "Cannot read Chip ID: %d\n", ret);
777 return ret;
778 }
779 if (chip_id != AW9523_VAL_EXPECTED_CHIPID) {
780 dev_err(awi->dev, "Bad ChipID; read 0x%x, expected 0x%x\n",
781 chip_id, AW9523_VAL_EXPECTED_CHIPID);
782 return -EINVAL;
783 }
784
785 return 0;
786 }
787
788 static int aw9523_hw_reset(struct aw9523 *awi)
789 {
790 int ret, max_retries = 2;
791
792 /* Sometimes the chip needs more than one reset cycle */
793 do {
794 ret = aw9523_drive_reset_gpio(awi);
795 if (ret == 0)
796 break;
797 max_retries--;
798 } while (max_retries);
799
800 return ret;
801 }
802
803 static int aw9523_init_gpiochip(struct aw9523 *awi, unsigned int npins)
804 {
805 struct device *dev = awi->dev;
806 struct gpio_chip *gpiochip = &awi->gpio;
807
808 gpiochip->label = devm_kstrdup(dev, dev_name(dev), GFP_KERNEL);
809 if (!gpiochip->label)
810 return -ENOMEM;
811
812 gpiochip->base = -1;
813 gpiochip->ngpio = npins;
814 gpiochip->get_direction = aw9523_gpio_get_direction;
815 gpiochip->direction_input = aw9523_direction_input;
816 gpiochip->direction_output = aw9523_direction_output;
817 gpiochip->get = aw9523_gpio_get;
818 gpiochip->get_multiple = aw9523_gpio_get_multiple;
819 gpiochip->set = aw9523_gpio_set;
820 gpiochip->set_multiple = aw9523_gpio_set_multiple;
821 gpiochip->set_config = gpiochip_generic_config;
822 gpiochip->parent = dev;
823 gpiochip->of_node = dev->of_node;
824 gpiochip->owner = THIS_MODULE;
825 gpiochip->can_sleep = true;
826
827 return 0;
828 }
829
830 static int aw9523_init_irq(struct aw9523 *awi, int irq)
831 {
832 struct device *dev = awi->dev;
833 struct gpio_irq_chip *gpioirq;
834 struct irq_chip *irqchip;
835 int ret;
836
837 if (!device_property_read_bool(dev, "interrupt-controller"))
838 return 0;
839
840 irqchip = devm_kzalloc(dev, sizeof(*irqchip), GFP_KERNEL);
841 if (!irqchip)
842 return -ENOMEM;
843
844 awi->irq = devm_kzalloc(dev, sizeof(*awi->irq), GFP_KERNEL);
845 if (!awi->irq)
846 return -ENOMEM;
847
848 irqchip->name = devm_kstrdup(dev, dev_name(dev), GFP_KERNEL);
849 if (!irqchip->name)
850 return -ENOMEM;
851
852 irqchip->irq_mask = aw9523_irq_mask;
853 irqchip->irq_unmask = aw9523_irq_unmask;
854 irqchip->irq_bus_lock = aw9523_irq_bus_lock;
855 irqchip->irq_bus_sync_unlock = aw9523_irq_bus_sync_unlock;
856 irqchip->irq_set_type = aw9523_gpio_irq_type;
857 awi->irq->irqchip = irqchip;
858 mutex_init(&awi->irq->lock);
859
860 ret = devm_request_threaded_irq(dev, irq, NULL, aw9523_irq_thread_func,
861 IRQF_ONESHOT, dev_name(dev), awi);
862 if (ret) {
863 dev_err(dev, "Failed to request irq %d\n", irq);
864 return ret;
865 }
866
867 gpioirq = &awi->gpio.irq;
868 gpioirq->chip = irqchip;
869 gpioirq->parent_handler = NULL;
870 gpioirq->num_parents = 0;
871 gpioirq->parents = NULL;
872 gpioirq->default_type = IRQ_TYPE_LEVEL_MASK;
873 gpioirq->handler = handle_simple_irq;
874 gpioirq->threaded = true;
875 gpioirq->first = 0;
876
877 return 0;
878 }
879
880 static bool aw9523_is_reg_hole(unsigned int reg)
881 {
882 return (reg > AW9523_REG_PORT_MODE(AW9523_PINS_PER_PORT) &&
883 reg < AW9523_REG_SOFT_RESET) ||
884 (reg > AW9523_REG_INTR_DIS(AW9523_PINS_PER_PORT) &&
885 reg < AW9523_REG_CHIPID);
886 }
887
888 static bool aw9523_readable_reg(struct device *dev, unsigned int reg)
889 {
890 /* All available registers (minus holes) can be read */
891 return !aw9523_is_reg_hole(reg);
892 }
893
894 static bool aw9523_volatile_reg(struct device *dev, unsigned int reg)
895 {
896 return aw9523_is_reg_hole(reg) ||
897 reg == AW9523_REG_IN_STATE(0) ||
898 reg == AW9523_REG_IN_STATE(AW9523_PINS_PER_PORT) ||
899 reg == AW9523_REG_CHIPID ||
900 reg == AW9523_REG_SOFT_RESET;
901 }
902
903 static bool aw9523_writeable_reg(struct device *dev, unsigned int reg)
904 {
905 return !aw9523_is_reg_hole(reg) && reg != AW9523_REG_CHIPID;
906 }
907
908 static bool aw9523_precious_reg(struct device *dev, unsigned int reg)
909 {
910 /* Reading AW9523_REG_IN_STATE clears interrupt status */
911 return aw9523_is_reg_hole(reg) ||
912 reg == AW9523_REG_IN_STATE(0) ||
913 reg == AW9523_REG_IN_STATE(AW9523_PINS_PER_PORT);
914 }
915
916 static const struct regmap_config aw9523_regmap = {
917 .reg_bits = 8,
918 .val_bits = 8,
919 .reg_stride = 1,
920
921 .precious_reg = aw9523_precious_reg,
922 .readable_reg = aw9523_readable_reg,
923 .volatile_reg = aw9523_volatile_reg,
924 .writeable_reg = aw9523_writeable_reg,
925
926 .cache_type = REGCACHE_FLAT,
927 .disable_locking = true,
928
929 .num_reg_defaults_raw = AW9523_REG_SOFT_RESET,
930 };
931
932 static int aw9523_hw_init(struct aw9523 *awi)
933 {
934 u8 p1_pin = AW9523_PINS_PER_PORT;
935 unsigned int val;
936 int ret;
937
938 /* No register caching during initialization */
939 regcache_cache_bypass(awi->regmap, true);
940
941 /* Bring up the chip */
942 ret = aw9523_hw_reset(awi);
943 if (ret) {
944 dev_err(awi->dev, "HW Reset failed: %d\n", ret);
945 return ret;
946 }
947
948 /*
949 * This is the expected chip and it is running: it's time to
950 * set a safe default configuration in case the user doesn't
951 * configure (all of the available) pins in this chip.
952 * P.S.: The writes order doesn't matter.
953 */
954
955 /* Set all pins as GPIO */
956 ret = regmap_write(awi->regmap, AW9523_REG_PORT_MODE(0), U8_MAX);
957 if (ret)
958 return ret;
959 ret = regmap_write(awi->regmap, AW9523_REG_PORT_MODE(p1_pin), U8_MAX);
960 if (ret)
961 return ret;
962
963 /* Set Open-Drain mode on Port 0 (Port 1 is always P-P) */
964 ret = regmap_write(awi->regmap, AW9523_REG_GCR, 0);
965 if (ret)
966 return ret;
967
968 /* Set all pins as inputs */
969 ret = regmap_write(awi->regmap, AW9523_REG_CONF_STATE(0), U8_MAX);
970 if (ret)
971 return ret;
972 ret = regmap_write(awi->regmap, AW9523_REG_CONF_STATE(p1_pin), U8_MAX);
973 if (ret)
974 return ret;
975
976 /* Disable all interrupts to avoid unreasoned wakeups */
977 ret = regmap_write(awi->regmap, AW9523_REG_INTR_DIS(0), U8_MAX);
978 if (ret)
979 return ret;
980 ret = regmap_write(awi->regmap, AW9523_REG_INTR_DIS(p1_pin), U8_MAX);
981 if (ret)
982 return ret;
983
984 /* Clear setup-generated interrupts by performing a port state read */
985 ret = aw9523_get_port_state(awi->regmap, 0, 0, &val);
986 if (ret)
987 return ret;
988 ret = aw9523_get_port_state(awi->regmap, p1_pin, 0, &val);
989 if (ret)
990 return ret;
991
992 /* Everything went fine: activate and reinitialize register cache */
993 regcache_cache_bypass(awi->regmap, false);
994 return regmap_reinit_cache(awi->regmap, &aw9523_regmap);
995 }
996
997 static int aw9523_probe(struct i2c_client *client,
998 const struct i2c_device_id *id)
999 {
1000 struct device *dev = &client->dev;
1001 struct pinctrl_desc *pdesc;
1002 struct aw9523 *awi;
1003 int ret;
1004
1005 awi = devm_kzalloc(dev, sizeof(*awi), GFP_KERNEL);
1006 if (!awi)
1007 return -ENOMEM;
1008
1009 i2c_set_clientdata(client, awi);
1010
1011 awi->dev = dev;
1012 awi->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
1013 if (IS_ERR(awi->reset_gpio))
1014 return PTR_ERR(awi->reset_gpio);
1015 gpiod_set_consumer_name(awi->reset_gpio, "aw9523 reset");
1016
1017 awi->regmap = devm_regmap_init_i2c(client, &aw9523_regmap);
1018 if (IS_ERR(awi->regmap))
1019 return PTR_ERR(awi->regmap);
1020
1021 awi->vio_vreg = devm_regulator_get_optional(dev, "vio");
1022 if (IS_ERR(awi->vio_vreg)) {
1023 if (PTR_ERR(awi->vio_vreg) == -EPROBE_DEFER)
1024 return -EPROBE_DEFER;
1025 awi->vio_vreg = NULL;
1026 } else {
1027 ret = regulator_enable(awi->vio_vreg);
1028 if (ret)
1029 return ret;
1030 }
1031
1032 mutex_init(&awi->i2c_lock);
1033 lockdep_set_subclass(&awi->i2c_lock,
1034 i2c_adapter_depth(client->adapter));
1035
1036 pdesc = devm_kzalloc(dev, sizeof(*pdesc), GFP_KERNEL);
1037 if (!pdesc)
1038 return -ENOMEM;
1039
1040 ret = aw9523_hw_init(awi);
1041 if (ret)
1042 goto err_disable_vregs;
1043
1044 pdesc->name = dev_name(dev);
1045 pdesc->owner = THIS_MODULE;
1046 pdesc->pctlops = &aw9523_pinctrl_ops;
1047 pdesc->pmxops = &aw9523_pinmux_ops;
1048 pdesc->confops = &aw9523_pinconf_ops;
1049 pdesc->pins = aw9523_pins;
1050 pdesc->npins = ARRAY_SIZE(aw9523_pins);
1051
1052 ret = aw9523_init_gpiochip(awi, pdesc->npins);
1053 if (ret)
1054 goto err_disable_vregs;
1055
1056 if (client->irq) {
1057 ret = aw9523_init_irq(awi, client->irq);
1058 if (ret)
1059 goto err_disable_vregs;
1060 }
1061
1062 awi->pctl = devm_pinctrl_register(dev, pdesc, awi);
1063 if (IS_ERR(awi->pctl)) {
1064 ret = PTR_ERR(awi->pctl);
1065 dev_err(dev, "Cannot register pinctrl: %d", ret);
1066 goto err_disable_vregs;
1067 }
1068
1069 ret = devm_gpiochip_add_data(dev, &awi->gpio, awi);
1070 if (ret)
1071 goto err_disable_vregs;
1072
1073 return ret;
1074
1075 err_disable_vregs:
1076 if (awi->vio_vreg)
1077 regulator_disable(awi->vio_vreg);
1078 mutex_destroy(&awi->i2c_lock);
1079 return ret;
1080 }
1081
1082 static int aw9523_remove(struct i2c_client *client)
1083 {
1084 struct aw9523 *awi = i2c_get_clientdata(client);
1085 int ret;
1086
1087 if (!awi)
1088 return 0;
1089
1090 /*
1091 * If the chip VIO is connected to a regulator that we can turn
1092 * off, life is easy... otherwise, reinitialize the chip and
1093 * set the pins to hardware defaults before removing the driver
1094 * to leave it in a clean, safe and predictable state.
1095 */
1096 if (awi->vio_vreg) {
1097 regulator_disable(awi->vio_vreg);
1098 } else {
1099 mutex_lock(&awi->i2c_lock);
1100 ret = aw9523_hw_init(awi);
1101 mutex_unlock(&awi->i2c_lock);
1102 if (ret)
1103 return ret;
1104 }
1105
1106 mutex_destroy(&awi->i2c_lock);
1107 return 0;
1108 }
1109
1110 static const struct i2c_device_id aw9523_i2c_id_table[] = {
1111 { "aw9523_i2c", 0 },
1112 { }
1113 };
1114 MODULE_DEVICE_TABLE(i2c, aw9523_i2c_id_table);
1115
1116 static const struct of_device_id of_aw9523_i2c_match[] = {
1117 { .compatible = "awinic,aw9523-pinctrl", },
1118 };
1119 MODULE_DEVICE_TABLE(of, of_aw9523_i2c_match);
1120
1121 static struct i2c_driver aw9523_driver = {
1122 .driver = {
1123 .name = "aw9523-pinctrl",
1124 .of_match_table = of_aw9523_i2c_match,
1125 },
1126 .probe = aw9523_probe,
1127 .remove = aw9523_remove,
1128 .id_table = aw9523_i2c_id_table,
1129 };
1130 module_i2c_driver(aw9523_driver);
1131
1132 MODULE_DESCRIPTION("Awinic AW9523 I2C GPIO Expander driver");
1133 MODULE_AUTHOR("AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>");
1134 MODULE_LICENSE("GPL v2");
1135 MODULE_ALIAS("platform:aw9523");