ramips: convert rt2x00 EEPROM to NVMEM format
[openwrt/staging/hauke.git] / target / linux / ramips / dts / rt5350_dlink_dwr-512-b.dts
1 #include "rt5350.dtsi"
2
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/input/input.h>
5
6 / {
7 compatible = "dlink,dwr-512-b", "ralink,rt5350-soc";
8 model = "D-Link DWR-512 B";
9
10 aliases {
11 led-boot = &led_status;
12 led-failsafe = &led_status;
13 led-running = &led_status;
14 led-upgrade = &led_status;
15 };
16
17 keys {
18 compatible = "gpio-keys-polled";
19 poll-interval = <20>;
20
21 wps {
22 label = "wps";
23 gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
24 linux,code = <KEY_WPS_BUTTON>;
25 };
26
27 reset {
28 label = "reset";
29 gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
30 linux,code = <KEY_RESTART>;
31 };
32 };
33
34 leds {
35 compatible = "gpio-leds";
36
37 sms {
38 label = "green:sms";
39 gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
40 };
41 led_status: status {
42 label = "green:status";
43 gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
44 };
45 2g {
46 label = "green:2g";
47 gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
48 };
49 3g {
50 label = "green:3g";
51 gpios = <&gpio0 19 GPIO_ACTIVE_LOW>;
52 };
53 sstrengthr {
54 label = "red:sigstrength";
55 gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
56 };
57 sstrengthg {
58 label = "green:sigstrength";
59 gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
60 };
61 };
62
63 gpio-export {
64 compatible = "gpio-export";
65 #size-cells = <0>;
66
67 slic_int {
68 gpio-export,name = "slic_int";
69 gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
70 };
71 modem3g_enable {
72 gpio-export,name = "modem3g_enable";
73 gpio-export,output = <1>;
74 gpios = <&gpio0 18 GPIO_ACTIVE_HIGH>;
75 };
76 };
77 };
78
79 &spi0 {
80 status = "okay";
81
82 flash@0 {
83 compatible = "jedec,spi-nor";
84 reg = <0>;
85 spi-max-frequency = <30000000>;
86 m25p,fast-read;
87
88 partitions {
89 compatible = "fixed-partitions";
90 #address-cells = <1>;
91 #size-cells = <1>;
92
93 partition@0 {
94 label = "jboot";
95 reg = <0x0 0x10000>;
96 read-only;
97 };
98
99 partition@10000 {
100 compatible = "amit,jimage";
101 label = "firmware";
102 reg = <0x10000 0x7e0000>;
103 };
104
105 config: partition@7f0000 {
106 compatible = "nvmem-cells";
107 label = "config";
108 reg = <0x7f0000 0x10000>;
109 #address-cells = <1>;
110 #size-cells = <1>;
111
112 macaddr_config_e07e: macaddr@e07e {
113 reg = <0xe07e 0x6>;
114 };
115
116 eeprom_config_e08a: eeprom@e08a {
117 reg = <0xe08a 0x200>;
118 };
119 };
120 };
121 };
122 };
123
124 &spi1 {
125 status = "okay";
126
127 spidev@0 {
128 #address-cells = <1>;
129 #size-cells = <1>;
130 compatible = "silabs,si3210";
131
132 reg = <0>;
133 spi-max-frequency = <1000000>;
134 };
135 };
136
137 &state_default {
138 gpio {
139 groups = "i2c", "jtag", "uartf";
140 function = "gpio";
141 };
142 };
143
144 &esw {
145 mediatek,portmap = <0x2f>;
146 };
147
148 &ethernet {
149 nvmem-cells = <&macaddr_config_e07e>;
150 nvmem-cell-names = "mac-address";
151 };
152
153 &wmac {
154 ralink,led-polarity = <1>;
155 nvmem-cells = <&eeprom_config_e08a>, <&macaddr_config_e07e>;
156 nvmem-cell-names = "eeprom", "mac-address";
157 };