f19f8704adeaf9ec55f6eac654992ba7612f7987
[openwrt/staging/nbd.git] / target / linux / ramips / dts / mt7628an_tplink_archer-c50-v3.dts
1 #include "mt7628an_tplink_8m.dtsi"
2
3 / {
4 compatible = "tplink,archer-c50-v3", "mediatek,mt7628an-soc";
5 model = "TP-Link Archer C50 v3";
6
7 aliases {
8 led-boot = &led_power;
9 led-failsafe = &led_power;
10 led-running = &led_power;
11 led-upgrade = &led_power;
12 };
13
14 keys {
15 compatible = "gpio-keys";
16
17 reset {
18 label = "reset";
19 gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
20 linux,code = <KEY_RESTART>;
21 };
22
23 rfkill {
24 label = "rfkill";
25 gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
26 linux,code = <KEY_RFKILL>;
27 };
28 };
29
30 leds {
31 compatible = "gpio-leds";
32
33 lan {
34 function = LED_FUNCTION_LAN;
35 color = <LED_COLOR_ID_GREEN>;
36 gpios = <&gpio 41 GPIO_ACTIVE_LOW>;
37 };
38
39 led_power: power {
40 function = LED_FUNCTION_POWER;
41 color = <LED_COLOR_ID_GREEN>;
42 gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
43 };
44
45 wan {
46 function = LED_FUNCTION_WAN;
47 color = <LED_COLOR_ID_GREEN>;
48 gpios = <&gpio 39 GPIO_ACTIVE_LOW>;
49 };
50
51 wan_orange {
52 function = LED_FUNCTION_WAN;
53 color = <LED_COLOR_ID_ORANGE>;
54 gpios = <&gpio 40 GPIO_ACTIVE_LOW>;
55 };
56
57 wlan {
58 label = "green:wlan2g";
59 gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
60 };
61
62 wlan5 {
63 label = "green:wlan5g";
64 gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
65 };
66
67 wps {
68 function = LED_FUNCTION_WPS;
69 color = <LED_COLOR_ID_GREEN>;
70 gpios = <&gpio 43 GPIO_ACTIVE_LOW>;
71 };
72 };
73 };
74
75 &ehci {
76 status = "disabled";
77 };
78
79 &ohci {
80 status = "disabled";
81 };
82
83 &state_default {
84 gpio {
85 groups = "i2c", "gpio", "p0led_an", "p1led_an", "p2led_an",
86 "p3led_an", "p4led_an", "wdt", "wled_an";
87 function = "gpio";
88 };
89 };
90
91 &wmac {
92 status = "okay";
93
94 nvmem-cells = <&eeprom_factory_20000>, <&macaddr_factory_f100 0>;
95 nvmem-cell-names = "eeprom", "mac-address";
96 };
97
98 &esw {
99 mediatek,portmap = <0x3e>;
100 };
101
102 &pcie {
103 status = "okay";
104 };
105
106 &pcie0 {
107 mt76@0,0 {
108 reg = <0x0000 0 0 0 0>;
109 ieee80211-freq-limit = <5000000 6000000>;
110 nvmem-cells = <&eeprom_factory_28000>, <&macaddr_factory_f100 (-1)>;
111 nvmem-cell-names = "eeprom", "mac-address";
112 };
113 #include <dt-bindings/leds/common.h>
114
115 };