target/linux/ramips/dts/mt7628an_motorola_mwr03.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include "mt7628an.dtsi"
   4
   5 #include <dt-bindings/gpio/gpio.h>
   6 #include <dt-bindings/input/input.h>
   7
   8 / {
   9         model = "Motorola MWR03";
  10         compatible = "motorola,mwr03", "mediatek,mt7628an-soc";
  11
  12         aliases {
  13                 led-boot = &led_status_orange;
  14                 led-failsafe = &led_status_orange;
  15                 led-running = &led_status_white;
  16                 led-upgrade = &led_status_orange;
  17         };
  18
  19         keys {
  20                 compatible = "gpio-keys";
  21
  22                 reset {
  23                         label = "reset";
  24                         gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
  25                         linux,code = <KEY_RESTART>;
  26                 };
  27         };
  28
  29         leds {
  30                 compatible = "gpio-leds";
  31
  32                 led_status_orange: status_orange {
  33                         label = "orange:status";
  34                         gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
  35                 };
  36
  37                 led_status_white: status_white {
  38                         label = "white:status";
  39                         gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
  40                 };
  41         };
  42 };
  43
  44 &spi0 {
  45         status = "okay";
  46
  47         flash@0 {
  48                 compatible = "jedec,spi-nor";
  49                 reg = <0>;
  50                 spi-max-frequency = <80000000>;
  51                 m25p,fast-read;
  52
  53                 partitions {
  54                         compatible = "fixed-partitions";
  55                         #address-cells = <1>;
  56                         #size-cells = <1>;
  57
  58                         partition@0 {
  59                                 label = "bootloader";
  60                                 reg = <0x0 0x30000>;
  61                                 read-only;
  62                         };
  63
  64                         partition@30000 {
  65                                 label = "config";
  66                                 reg = <0x30000 0x10000>;
  67                                 read-only;
  68                         };
  69
  70                         factory: partition@40000 {
  71                                 compatible = "nvmem-cells";
  72                                 label = "factory";
  73                                 reg = <0x40000 0x10000>;
  74                                 #address-cells = <1>;
  75                                 #size-cells = <1>;
  76                                 read-only;
  77
  78                                 eeprom_factory_0: eeprom@0 {
  79                                         reg = <0x0 0x400>;
  80                                 };
  81
  82                                 macaddr_factory_4: macaddr@4 {
  83                                         reg = <0x4 0x6>;
  84                                 };
  85                         };
  86
  87                         partition@50000 {
  88                                 compatible = "denx,uimage";
  89                                 label = "firmware";
  90                                 reg = <0x50000 0x7b0000>;
  91                         };
  92                 };
  93         };
  94 };
  95
  96 &state_default {
  97         gpio {
  98                 groups = "i2c", "i2s";
  99                 function = "gpio";
 100         };
 101 };
 102
 103 &usbphy {
 104         status = "disabled";
 105 };
 106
 107 &ehci {
 108         status = "disabled";
 109 };
 110
 111 &ohci {
 112         status = "disabled";
 113 };
 114
 115 &ethernet {
 116         nvmem-cells = <&macaddr_factory_4>;
 117         nvmem-cell-names = "mac-address";
 118         mac-address-increment = <(-1)>;
 119 };
 120
 121 &esw {
 122         mediatek,portmap = <0x3e>;
 123         mediatek,portdisable = <0x30>;
 124 };
 125
 126 &pcie {
 127         status = "okay";
 128 };
 129
 130 &pcie0 {
 131         wifi@0,0 {
 132                 reg = <0x0000 0 0 0 0>;
 133                 mediatek,mtd-eeprom = <&factory 0x8000>;
 134                 ieee80211-freq-limit = <5000000 6000000>;
 135         };
 136 };
 137
 138 &wmac {
 139         status = "okay";
 140
 141         nvmem-cells = <&eeprom_factory_0>;
 142         nvmem-cell-names = "eeprom";
 143 };