ramips: convert MT7613 and MT7615 EEPROM to NVMEM format for MT7621
[openwrt/staging/jow.git] / target / linux / ramips / dts / mt7621_iptime_a6004ns-m.dtsi
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "mt7621.dtsi"
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7
8 / {
9 aliases {
10 led-boot = &led_cpu;
11 led-failsafe = &led_cpu;
12 led-running = &led_cpu;
13 led-upgrade = &led_cpu;
14 label-mac-device = &gmac0;
15 };
16
17 leds {
18 compatible = "gpio-leds";
19
20 usb {
21 label = "blue:usb";
22 gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
23 trigger-sources = <&xhci_ehci_port1>;
24 linux,default-trigger = "usbport";
25 };
26
27 wlan5g {
28 label = "blue:wlan5g";
29 gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
30 linux,default-trigger = "phy0radio";
31 };
32
33 wlan2g {
34 label = "blue:wlan2g";
35 gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
36 linux,default-trigger = "phy1radio";
37 };
38
39 led_cpu: cpu {
40 label = "blue:cpu";
41 gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
42 };
43 };
44
45 keys {
46 compatible = "gpio-keys";
47
48 wps {
49 label = "wps";
50 gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
51 linux,code = <KEY_WPS_BUTTON>;
52 };
53
54 reset {
55 label = "reset";
56 gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
57 linux,code = <KEY_RESTART>;
58 };
59 };
60 };
61
62 &spi0 {
63 status = "okay";
64
65 flash@0 {
66 compatible = "jedec,spi-nor";
67 reg = <0>;
68 spi-max-frequency = <80000000>;
69 m25p,fast-read;
70
71 partitions {
72 compatible = "fixed-partitions";
73 #address-cells = <1>;
74 #size-cells = <1>;
75
76 uboot: partition@0 {
77 compatible = "nvmem-cells";
78 label = "u-boot";
79 reg = <0x0 0x20000>;
80 #address-cells = <1>;
81 #size-cells = <1>;
82 read-only;
83
84 macaddr_uboot_1fc20: macaddr@1fc20 {
85 reg = <0x1fc20 0x6>;
86 };
87
88 macaddr_uboot_1fc40: macaddr@1fc40 {
89 reg = <0x1fc40 0x6>;
90 };
91 };
92
93 partition@20000 {
94 label = "config";
95 reg = <0x20000 0x10000>;
96 read-only;
97 };
98
99 factory: partition@30000 {
100 compatible = "nvmem-cells";
101 label = "factory";
102 reg = <0x30000 0x10000>;
103 #address-cells = <1>;
104 #size-cells = <1>;
105 read-only;
106
107 eeprom_factory_0: eeprom@0 {
108 reg = <0x0 0x4da8>;
109 };
110
111 eeprom_factory_8000: eeprom@8000 {
112 reg = <0x8000 0x4da8>;
113 };
114 };
115
116 partition@40000 {
117 compatible = "denx,uimage";
118 label = "firmware";
119 reg = <0x40000 0xfc0000>;
120 };
121 };
122 };
123 };
124
125 &state_default {
126 gpio {
127 groups = "i2c", "uart3", "jtag", "wdt";
128 function = "gpio";
129 };
130 };
131
132 &gmac0 {
133 nvmem-cells = <&macaddr_uboot_1fc20>;
134 nvmem-cell-names = "mac-address";
135 };
136
137 &gmac1 {
138 status = "okay";
139 label = "wan";
140 phy-handle = <&ethphy0>;
141
142 nvmem-cells = <&macaddr_uboot_1fc40>;
143 nvmem-cell-names = "mac-address";
144 };
145
146 &mdio {
147 ethphy0: ethernet-phy@0 {
148 reg = <0>;
149 };
150 };
151
152 &switch0 {
153 ports {
154 port@1 {
155 status = "okay";
156 label = "lan1";
157 };
158
159 port@2 {
160 status = "okay";
161 label = "lan2";
162 };
163
164 port@3 {
165 status = "okay";
166 label = "lan3";
167 };
168
169 port@4 {
170 status = "okay";
171 label = "lan4";
172 };
173 };
174 };
175
176 &pcie {
177 status = "okay";
178 };
179
180 &pcie0 {
181 wifi@0,0 {
182 compatible = "mediatek,mt76";
183 reg = <0x0000 0 0 0 0>;
184 nvmem-cells = <&eeprom_factory_0>;
185 nvmem-cell-names = "eeprom";
186 ieee80211-freq-limit = <5000000 6000000>;
187 };
188 };
189
190 &pcie1 {
191 wifi@0,0 {
192 compatible = "mediatek,mt76";
193 reg = <0x0000 0 0 0 0>;
194 nvmem-cells = <&eeprom_factory_8000>;
195 nvmem-cell-names = "eeprom";
196 ieee80211-freq-limit = <2400000 2500000>;
197 };
198 };