target/linux/ramips/dts/mt7620n.dtsi

   1 /dts-v1/;
   2
   3 / {
   4         #address-cells = <1>;
   5         #size-cells = <1>;
   6         compatible = "ralink,mt7620n-soc";
   7
   8         aliases {
   9                 spi0 = &spi0;
  10                 spi1 = &spi1;
  11                 serial0 = &uartlite;
  12         };
  13
  14         cpus {
  15                 #address-cells = <1>;
  16                 #size-cells = <0>;
  17
  18                 cpu@0 {
  19                         compatible = "mips,mips24KEc";
  20                         reg = <0>;
  21                 };
  22         };
  23
  24         chosen {
  25                 bootargs = "console=ttyS0,57600";
  26         };
  27
  28         cpuintc: cpuintc {
  29                 #address-cells = <0>;
  30                 #interrupt-cells = <1>;
  31                 interrupt-controller;
  32                 compatible = "mti,cpu-interrupt-controller";
  33         };
  34
  35         palmbus: palmbus@10000000 {
  36                 compatible = "palmbus";
  37                 reg = <0x10000000 0x200000>;
  38                 ranges = <0x0 0x10000000 0x1FFFFF>;
  39
  40                 #address-cells = <1>;
  41                 #size-cells = <1>;
  42
  43                 sysc: syscon@0 {
  44                         compatible = "ralink,mt7620-sysc", "syscon";
  45                         reg = <0x0 0x100>;
  46                         #clock-cells = <1>;
  47                         #reset-cells = <1>;
  48                 };
  49
  50                 timer: timer@100 {
  51                         compatible = "ralink,mt7620a-timer", "ralink,rt2880-timer";
  52                         reg = <0x100 0x20>;
  53
  54                         clocks = <&sysc 5>;
  55
  56                         interrupt-parent = <&intc>;
  57                         interrupts = <1>;
  58                 };
  59
  60                 watchdog: watchdog@120 {
  61                         compatible = "ralink,mt7620a-wdt", "ralink,rt2880-wdt";
  62                         reg = <0x120 0x10>;
  63
  64                         clocks = <&sysc 6>;
  65
  66                         resets = <&sysc 8>;
  67                         reset-names = "wdt";
  68
  69                         interrupt-parent = <&intc>;
  70                         interrupts = <1>;
  71                 };
  72
  73                 intc: intc@200 {
  74                         compatible = "ralink,mt7620a-intc", "ralink,rt2880-intc";
  75                         reg = <0x200 0x100>;
  76
  77                         interrupt-controller;
  78                         #interrupt-cells = <1>;
  79
  80                         interrupt-parent = <&cpuintc>;
  81                         interrupts = <2>;
  82                 };
  83
  84                 memc: memc@300 {
  85                         compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
  86                         reg = <0x300 0x100>;
  87
  88                         interrupt-parent = <&intc>;
  89                         interrupts = <3>;
  90                 };
  91
  92                 gpio0: gpio@600 {
  93                         compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
  94                         reg = <0x600 0x34>;
  95
  96                         interrupt-parent = <&intc>;
  97                         interrupts = <6>;
  98
  99                         gpio-controller;
 100                         #gpio-cells = <2>;
 101
 102                         ngpios = <24>;
 103                         ralink,gpio-base = <0>;
 104                         ralink,register-map = [ 00 04 08 0c
 105                                                 20 24 28 2c
 106                                                 30 34 ];
 107                 };
 108
 109                 gpio1: gpio@638 {
 110                         compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
 111                         reg = <0x638 0x24>;
 112
 113                         interrupt-parent = <&intc>;
 114                         interrupts = <6>;
 115
 116                         gpio-controller;
 117                         #gpio-cells = <2>;
 118
 119                         ngpios = <16>;
 120                         ralink,gpio-base = <24>;
 121                         ralink,register-map = [ 00 04 08 0c
 122                                                 10 14 18 1c
 123                                                 20 24 ];
 124
 125                         status = "disabled";
 126                 };
 127
 128                 gpio2: gpio@660 {
 129                         compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
 130                         reg = <0x660 0x24>;
 131
 132                         interrupt-parent = <&intc>;
 133                         interrupts = <6>;
 134
 135                         gpio-controller;
 136                         #gpio-cells = <2>;
 137
 138                         ngpios = <32>;
 139                         ralink,gpio-base = <40>;
 140                         ralink,register-map = [ 00 04 08 0c
 141                                                 10 14 18 1c
 142                                                 20 24 ];
 143
 144                         status = "disabled";
 145                 };
 146
 147                 gpio3: gpio@688 {
 148                         compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
 149                         reg = <0x688 0x24>;
 150
 151                         interrupt-parent = <&intc>;
 152                         interrupts = <6>;
 153
 154                         gpio-controller;
 155                         #gpio-cells = <2>;
 156
 157                         ngpios = <1>;
 158                         ralink,gpio-base = <72>;
 159                         ralink,register-map = [ 00 04 08 0c
 160                                                 10 14 18 1c
 161                                                 20 24 ];
 162
 163                         status = "disabled";
 164                 };
 165
 166                 i2c: i2c@900 {
 167                         compatible = "ralink,rt2880-i2c";
 168                         reg = <0x900 0x100>;
 169
 170                         clocks = <&sysc 8>;
 171
 172                         resets = <&sysc 16>;
 173                         reset-names = "i2c";
 174
 175                         #address-cells = <1>;
 176                         #size-cells = <0>;
 177
 178                         status = "disabled";
 179
 180                         pinctrl-names = "default";
 181                         pinctrl-0 = <&i2c_pins>;
 182                 };
 183
 184                 spi0: spi@b00 {
 185                         compatible = "ralink,mt7620a-spi", "ralink,rt2880-spi";
 186                         reg = <0xb00 0x40>;
 187
 188                         clocks = <&sysc 10>;
 189
 190                         resets = <&sysc 18>;
 191                         reset-names = "spi";
 192
 193                         #address-cells = <1>;
 194                         #size-cells = <0>;
 195
 196                         status = "disabled";
 197
 198                         pinctrl-names = "default";
 199                         pinctrl-0 = <&spi_pins>;
 200                 };
 201
 202                 spi1: spi@b40 {
 203                         compatible = "ralink,rt2880-spi";
 204                         reg = <0xb40 0x60>;
 205
 206                         clocks = <&sysc 11>;
 207
 208                         resets = <&sysc 18>;
 209                         reset-names = "spi";
 210
 211                         #address-cells = <1>;
 212                         #size-cells = <0>;
 213
 214                         status = "disabled";
 215
 216                         pinctrl-names = "default";
 217                         pinctrl-0 = <&spi_cs1>;
 218                 };
 219
 220                 uartlite: uartlite@c00 {
 221                         compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
 222                         reg = <0xc00 0x100>;
 223
 224                         clocks = <&sysc 12>;
 225
 226                         resets = <&sysc 19>;
 227
 228                         interrupt-parent = <&intc>;
 229                         interrupts = <12>;
 230
 231                         reg-shift = <2>;
 232
 233                         pinctrl-names = "default";
 234                         pinctrl-0 = <&uartlite_pins>;
 235                 };
 236
 237                 systick: systick@d00 {
 238                         compatible = "ralink,mt7620a-systick", "ralink,cevt-systick";
 239                         reg = <0xd00 0x10>;
 240
 241                         interrupt-parent = <&cpuintc>;
 242                         interrupts = <7>;
 243                 };
 244         };
 245
 246         pinctrl: pinctrl {
 247                 compatible = "ralink,rt2880-pinmux";
 248                 pinctrl-names = "default";
 249                 pinctrl-0 = <&state_default>;
 250
 251                 state_default: pinctrl0 {
 252                 };
 253
 254                 ephy_pins: ephy {
 255                         ephy {
 256                                 groups = "ephy";
 257                                 function = "ephy";
 258                         };
 259                 };
 260
 261                 spi_pins: spi_pins {
 262                         spi_pins {
 263                                 groups = "spi";
 264                                 function = "spi";
 265                         };
 266                 };
 267
 268                 spi_cs1: spi1 {
 269                         spi1 {
 270                                 groups = "spi refclk";
 271                                 function = "spi refclk";
 272                         };
 273                 };
 274
 275                 i2c_pins: i2c_pins {
 276                         i2c_pins {
 277                                 groups = "i2c";
 278                                 function = "i2c";
 279                         };
 280                 };
 281
 282                 uartlite_pins: uartlite {
 283                         uart {
 284                                 groups = "uartlite";
 285                                 function = "uartlite";
 286                         };
 287                 };
 288         };
 289
 290         usbphy: usbphy {
 291                 compatible = "mediatek,mt7620-usbphy";
 292                 #phy-cells = <0>;
 293
 294                 ralink,sysctl = <&sysc>;
 295                 /* usb phy reset is only controled by RSTCTRL bit 25 */
 296                 resets = <&sysc 25>, <&sysc 22>;
 297                 reset-names = "host", "device";
 298         };
 299
 300         ethernet: ethernet@10100000 {
 301                 compatible = "mediatek,mt7620-eth";
 302                 reg = <0x10100000 0x10000>;
 303
 304                 #address-cells = <1>;
 305                 #size-cells = <0>;
 306
 307                 interrupt-parent = <&cpuintc>;
 308                 interrupts = <5>;
 309
 310                 resets = <&sysc 21>, <&sysc 23>;
 311                 reset-names = "fe", "esw";
 312
 313                 mediatek,switch = <&gsw>;
 314         };
 315
 316         gsw: gsw@10110000 {
 317                 compatible = "mediatek,mt7620-gsw";
 318                 reg = <0x10110000 0x8000>;
 319
 320                 resets = <&sysc 24>;
 321                 reset-names = "ephy";
 322
 323                 interrupt-parent = <&intc>;
 324                 interrupts = <17>;
 325         };
 326
 327         ehci: ehci@101c0000 {
 328                 #address-cells = <1>;
 329                 #size-cells = <0>;
 330                 compatible = "generic-ehci";
 331                 reg = <0x101c0000 0x1000>;
 332
 333                 interrupt-parent = <&intc>;
 334                 interrupts = <18>;
 335
 336                 phys = <&usbphy>;
 337                 phy-names = "usb";
 338
 339                 status = "disabled";
 340
 341                 ehci_port1: port@1 {
 342                         reg = <1>;
 343                         #trigger-source-cells = <0>;
 344                 };
 345         };
 346
 347         ohci: ohci@101c1000 {
 348                 #address-cells = <1>;
 349                 #size-cells = <0>;
 350                 compatible = "generic-ohci";
 351                 reg = <0x101c1000 0x1000>;
 352
 353                 phys = <&usbphy>;
 354                 phy-names = "usb";
 355
 356                 interrupt-parent = <&intc>;
 357                 interrupts = <18>;
 358
 359                 status = "disabled";
 360
 361                 ohci_port1: port@1 {
 362                         reg = <1>;
 363                         #trigger-source-cells = <0>;
 364                 };
 365         };
 366
 367         wmac: wmac@10180000 {
 368                 compatible = "ralink,rt7620-wmac", "ralink,rt2880-wmac";
 369                 reg = <0x10180000 0x40000>;
 370
 371                 clocks = <&sysc 13>;
 372
 373                 interrupt-parent = <&cpuintc>;
 374                 interrupts = <6>;
 375
 376                 ralink,eeprom = "soc_wmac.eeprom";
 377         };
 378 };