ramips: move dts-v1 statement to top-level DTSI files
[openwrt/staging/stintel.git] / target / linux / ramips / dts / mt7620a_zbtlink_zbt-ape522ii.dts
1 #include "mt7620a.dtsi"
2
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/input/input.h>
5
6 / {
7 compatible = "zbtlink,zbt-ape522ii", "ralink,mt7620a-soc";
8 model = "Zbtlink ZBT-APE522II";
9
10 chosen {
11 bootargs = "console=ttyS0,115200";
12 };
13
14 leds {
15 compatible = "gpio-leds";
16
17 sys1 {
18 label = "zbt-ape522ii:green:sys1";
19 gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
20 };
21
22 sys2 {
23 label = "zbt-ape522ii:green:sys2";
24 gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
25 };
26
27 sys3 {
28 label = "zbt-ape522ii:green:sys3";
29 gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
30 };
31
32 sys4 {
33 label = "zbt-ape522ii:green:sys4";
34 gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
35 };
36
37 wlan2g4 {
38 label = "zbt-ape522ii:green:wlan2g4";
39 gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
40 };
41 };
42
43 keys {
44 compatible = "gpio-keys";
45
46 reset {
47 label = "reset";
48 gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>;
49 linux,code = <KEY_RESTART>;
50 };
51 };
52 };
53
54 &gpio0 {
55 status = "okay";
56 };
57
58 &gpio1 {
59 status = "okay";
60 };
61
62 &gpio2 {
63 status = "okay";
64 };
65
66 &gpio3 {
67 status = "okay";
68 };
69
70 &spi0 {
71 status = "okay";
72
73 flash@0 {
74 compatible = "jedec,spi-nor";
75 reg = <0>;
76 spi-max-frequency = <10000000>;
77
78 partitions {
79 compatible = "fixed-partitions";
80 #address-cells = <1>;
81 #size-cells = <1>;
82
83 partition@0 {
84 label = "u-boot";
85 reg = <0x0 0x30000>;
86 };
87
88 partition@30000 {
89 label = "u-boot-env";
90 reg = <0x30000 0x10000>;
91 read-only;
92 };
93
94 factory: partition@40000 {
95 label = "factory";
96 reg = <0x40000 0x10000>;
97 read-only;
98 };
99
100 partition@50000 {
101 compatible = "denx,uimage";
102 label = "firmware";
103 reg = <0x50000 0xf80000>;
104 };
105 };
106 };
107 };
108
109 &ethernet {
110 pinctrl-names = "default";
111 pinctrl-0 = <&ephy_pins>;
112
113 mtd-mac-address = <&factory 0x4>;
114
115 mediatek,portmap = "llllw";
116 };
117
118 &wmac {
119 ralink,mtd-eeprom = <&factory 0x0>;
120 pinctrl-names = "default";
121 pinctrl-0 = <&pa_pins>;
122 };
123
124 &pcie {
125 status = "okay";
126 };
127
128 &pcie0 {
129 mt76@0,0 {
130 reg = <0x0000 0 0 0 0>;
131 mediatek,mtd-eeprom = <&factory 0x8000>;
132 ieee80211-freq-limit = <5000000 6000000>;
133 };
134 };
135
136 &state_default {
137 gpio {
138 groups = "wled", "i2c", "uartf", "wdt";
139 function = "gpio";
140 };
141 };