a4c99d35c49cfa15dd2aa15a4db914f2f235d4e0
[openwrt/staging/hauke.git] / target / linux / ramips / dts / mt7620a_planex_cs-qr10.dts
1 #include "mt7620a.dtsi"
2
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/input/input.h>
5
6 / {
7 compatible = "planex,cs-qr10", "ralink,mt7620a-soc";
8 model = "Planex CS-QR10";
9
10 aliases {
11 led-boot = &led_power;
12 led-failsafe = &led_power;
13 led-running = &led_power;
14 led-upgrade = &led_power;
15 };
16
17 leds {
18 compatible = "gpio-leds";
19
20 led_power: power {
21 label = "red:power";
22 gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
23 };
24 };
25
26 keys {
27 compatible = "gpio-keys";
28
29 s1 {
30 label = "reset";
31 gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
32 linux,code = <KEY_RESTART>;
33 };
34
35 s2 {
36 label = "wps";
37 gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
38 linux,code = <KEY_WPS_BUTTON>;
39 };
40 };
41 };
42
43 &gpio1 {
44 status = "okay";
45 };
46
47 &i2c {
48 status = "okay";
49 };
50
51 &i2s {
52 status = "okay";
53 pinctrl-names = "default";
54 pinctrl-0 = <&pcm_i2s_pins>;
55 };
56
57 &spi0 {
58 status = "okay";
59
60 flash@0 {
61 compatible = "jedec,spi-nor";
62 reg = <0>;
63 spi-max-frequency = <10000000>;
64
65 partitions {
66 compatible = "fixed-partitions";
67 #address-cells = <1>;
68 #size-cells = <1>;
69
70 partition@0 {
71 label = "u-boot";
72 reg = <0x0 0x30000>;
73 read-only;
74 };
75
76 partition@30000 {
77 label = "u-boot-env";
78 reg = <0x30000 0x10000>;
79 read-only;
80 };
81
82 factory: partition@40000 {
83 compatible = "nvmem-cells";
84 label = "factory";
85 reg = <0x40000 0x10000>;
86 #address-cells = <1>;
87 #size-cells = <1>;
88 read-only;
89
90 eeprom_factory_0: eeprom@0 {
91 reg = <0x0 0x200>;
92 };
93
94 macaddr_factory_4: macaddr@4 {
95 reg = <0x4 0x6>;
96 };
97 };
98
99 partition@50000 {
100 compatible = "denx,uimage";
101 label = "firmware";
102 reg = <0x50000 0x7b0000>;
103 };
104 };
105 };
106 };
107
108 &pcm {
109 status = "okay";
110 };
111
112 &gdma {
113 status = "okay";
114 };
115
116 &state_default {
117 gpio {
118 groups = "spi refclk", "rgmii1";
119 function = "gpio";
120 };
121 wdt {
122 groups = "wdt";
123 function = "wdt refclk";
124 };
125 };
126
127 &ethernet {
128 pinctrl-names = "default";
129 pinctrl-0 = <&ephy_pins>;
130
131 nvmem-cells = <&macaddr_factory_4>;
132 nvmem-cell-names = "mac-address";
133
134 mediatek,portmap = "llllw";
135 };
136
137 &sdhci {
138 status = "okay";
139 };
140
141 &ehci {
142 status = "okay";
143 };
144
145 &ohci {
146 status = "okay";
147 };
148
149 &wmac {
150 nvmem-cells = <&eeprom_factory_0>;
151 nvmem-cell-names = "eeprom";
152 };