target/linux/ramips/dts/mt7620a_lava_lr-25g001.dts

   1 #include "mt7620a.dtsi"
   2
   3 #include <dt-bindings/gpio/gpio.h>
   4 #include <dt-bindings/input/input.h>
   5 #include <dt-bindings/leds/common.h>
   6 #include <dt-bindings/mtd/partitions/uimage.h>
   7
   8 / {
   9         compatible = "lava,lr-25g001", "ralink,mt7620a-soc";
  10         model = "LAVA LR-25G001";
  11
  12         aliases {
  13                 led-boot = &led_status;
  14                 led-failsafe = &led_status;
  15                 led-running = &led_status;
  16                 led-upgrade = &led_status;
  17         };
  18
  19         keys {
  20                 compatible = "gpio-keys";
  21
  22                 wps {
  23                         label = "wps";
  24                         gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
  25                         linux,code = <KEY_WPS_BUTTON>;
  26                 };
  27
  28                 reset {
  29                         label = "reset";
  30                         gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
  31                         linux,code = <KEY_RESTART>;
  32                 };
  33         };
  34
  35         leds {
  36                 compatible = "gpio-leds";
  37
  38                 led_status: status {
  39                         function = LED_FUNCTION_STATUS;
  40                         color = <LED_COLOR_ID_GREEN>;
  41                         gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
  42                 };
  43
  44                 wifi2g {
  45                         label = "green:wifi2g";
  46                         gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
  47                         linux,default-trigger = "phy1tpt";
  48                 };
  49
  50                 wifi5g {
  51                         label = "green:wifi5g";
  52                         gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
  53                         linux,default-trigger = "phy0tpt";
  54                 };
  55         };
  56
  57         gpio_export {
  58                 compatible = "gpio-export";
  59                 #size-cells = <0>;
  60
  61                 usbpower {
  62                         gpio-export,name = "usbpower";
  63                         gpio-export,output = <1>;
  64                         gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
  65                 };
  66         };
  67 };
  68
  69 &spi0 {
  70         status = "okay";
  71
  72         flash@0 {
  73                 compatible = "jedec,spi-nor";
  74                 reg = <0>;
  75                 spi-max-frequency = <10000000>;
  76
  77                 partitions {
  78                         compatible = "fixed-partitions";
  79                         #address-cells = <1>;
  80                         #size-cells = <1>;
  81
  82                         partition@0 {
  83                                 label = "jboot";
  84                                 reg = <0x0 0x10000>;
  85                                 read-only;
  86                         };
  87
  88                         partition@10000 {
  89                                 compatible = "openwrt,uimage", "denx,uimage";
  90                                 openwrt,ih-magic = <IH_MAGIC_OKLI>;
  91                                 openwrt,offset = <0x10000>;
  92                                 label = "firmware";
  93                                 reg = <0x10000 0xfe0000>;
  94                         };
  95
  96                         partition@ff0000 {
  97                                 label = "config";
  98                                 reg = <0xff0000 0x10000>;
  99                                 read-only;
 100
 101                                 nvmem-layout {
 102                                         compatible = "fixed-layout";
 103                                         #address-cells = <1>;
 104                                         #size-cells = <1>;
 105
 106                                         eeprom_config_e08a: eeprom@e08a {
 107                                                 reg = <0xe08a 0x200>;
 108                                         };
 109
 110                                         macaddr_config_e07e: macaddr@e07e {
 111                                                 compatible = "mac-base";
 112                                                 reg = <0xe07e 0x6>;
 113                                                 #nvmem-cell-cells = <1>;
 114                                         };
 115                                 };
 116                         };
 117                 };
 118         };
 119 };
 120
 121 &ehci {
 122         status = "okay";
 123 };
 124
 125 &ohci {
 126         status = "okay";
 127 };
 128
 129 &ethernet {
 130         pinctrl-names = "default";
 131         pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>;
 132
 133         port@5 {
 134                 status = "okay";
 135                 phy-mode = "rgmii";
 136                 mediatek,fixed-link = <1000 1 1 1>;
 137         };
 138
 139         mdio-bus {
 140                 status = "okay";
 141
 142                 ethernet-phy@0 {
 143                         reg = <0>;
 144                         phy-mode = "rgmii";
 145                         qca,ar8327-initvals = <
 146                                 0x04 0x87300000 /* PORT0 PAD MODE CTRL */
 147                                 0x0c 0x00000000 /* PORT6 PAD MODE CTRL */
 148                                 0x7c 0x0000007e /* PORT0_STATUS */
 149                                 0x80 0x00001200 /* PORT1_STATUS */
 150                                 0x84 0x00001200 /* PORT2_STATUS */
 151                                 0x88 0x00001200 /* PORT3_STATUS */
 152                                 0x8c 0x00001200 /* PORT4_STATUS */
 153                                 0x90 0x00001200 /* PORT5_STATUS */
 154                                 0x94 0x00000000 /* PORT6_STATUS */
 155                         >;
 156                 };
 157         };
 158 };
 159
 160 &gsw {
 161         mediatek,ephy-base = /bits/ 8 <8>;
 162 };
 163
 164 &pcie {
 165         status = "okay";
 166 };
 167
 168 &pcie0 {
 169         mt76x0e@0,0 {
 170                 reg = <0x0000 0 0 0 0>;
 171                 nvmem-cells = <&eeprom_config_e08a>, <&macaddr_config_e07e 2>;
 172                 nvmem-cell-names = "eeprom", "mac-address";
 173         };
 174 };
 175
 176 &state_default {
 177         gpio {
 178                 groups = "uartf", "i2c";
 179                 function = "gpio";
 180         };
 181 };