target/linux/ramips/dts/mt7620a_edimax_ew-747x.dtsi

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include "mt7620a.dtsi"
   4
   5 #include <dt-bindings/gpio/gpio.h>
   6 #include <dt-bindings/input/input.h>
   7 #include <dt-bindings/leds/common.h>
   8 #include <dt-bindings/mtd/partitions/uimage.h>
   9
  10 / {
  11         compatible = "ralink,mt7620a-soc";
  12
  13         aliases {
  14                 led-boot = &led_power;
  15                 led-failsafe = &led_power;
  16                 led-running = &led_power;
  17                 led-upgrade = &led_power;
  18         };
  19
  20         keys {
  21                 compatible = "gpio-keys";
  22
  23                 reset_wps {
  24                         label = "reset_wps";
  25                         gpios = <&gpio2 20 GPIO_ACTIVE_LOW>;
  26                         linux,code = <KEY_RESTART>;
  27                 };
  28         };
  29
  30         leds {
  31                 compatible = "gpio-leds";
  32
  33                 led_power: power {
  34                         function = LED_FUNCTION_POWER;
  35                         color = <LED_COLOR_ID_GREEN>;
  36                         gpios = <&gpio2 27 GPIO_ACTIVE_LOW>;
  37                 };
  38
  39                 lan {
  40                         function = LED_FUNCTION_LAN;
  41                         color = <LED_COLOR_ID_GREEN>;
  42                         gpios = <&gpio2 26 GPIO_ACTIVE_LOW>;
  43                 };
  44
  45                 wps {
  46                         function = LED_FUNCTION_WPS;
  47                         color = <LED_COLOR_ID_GREEN>;
  48                         gpios = <&gpio2 28 GPIO_ACTIVE_LOW>;
  49                 };
  50         };
  51 };
  52
  53 &gpio1 {
  54         status = "okay";
  55 };
  56
  57 &gpio2 {
  58         status = "okay";
  59 };
  60
  61 &spi0 {
  62         status = "okay";
  63
  64         flash@0 {
  65                 compatible = "jedec,spi-nor";
  66                 reg = <0>;
  67                 spi-max-frequency = <10000000>;
  68
  69                 partitions {
  70                         compatible = "fixed-partitions";
  71                         #address-cells = <1>;
  72                         #size-cells = <1>;
  73
  74                         partition@0 {
  75                                 label = "u-boot";
  76                                 reg = <0x0 0x30000>;
  77                                 read-only;
  78                         };
  79
  80                         partition@30000 {
  81                                 label = "u-boot-env";
  82                                 reg = <0x30000 0x10000>;
  83                                 read-only;
  84                         };
  85
  86                         partition@40000 {
  87                                 label = "factory";
  88                                 reg = <0x40000 0x10000>;
  89                                 read-only;
  90
  91                                 nvmem-layout {
  92                                         compatible = "fixed-layout";
  93                                         #address-cells = <1>;
  94                                         #size-cells = <1>;
  95
  96                                         eeprom_factory_0: eeprom@0 {
  97                                                 reg = <0x0 0x200>;
  98                                         };
  99
 100                                         eeprom_factory_8000: eeprom@8000 {
 101                                                 reg = <0x8000 0x200>;
 102                                         };
 103
 104                                         macaddr_factory_4: macaddr@4 {
 105                                                 compatible = "mac-base";
 106                                                 reg = <0x4 0x6>;
 107                                                 #nvmem-cell-cells = <1>;
 108                                         };
 109                                 };
 110                         };
 111
 112                         partition@50000 {
 113                                 label = "cimage";
 114                                 reg = <0x50000 0x20000>;
 115                                 read-only;
 116                         };
 117
 118                         partition@70000 {
 119                                 compatible = "openwrt,uimage", "denx,uimage";
 120                                 openwrt,offset = <FW_EDIMAX_OFFSET>;
 121                                 openwrt,partition-magic = <FW_MAGIC_EDIMAX>;
 122                                 label = "firmware";
 123                                 reg = <0x00070000 0x00790000>;
 124                         };
 125                 };
 126         };
 127 };
 128
 129 &state_default {
 130         gpio {
 131                 groups = "i2c", "uartf", "nd_sd", "rgmii2";
 132                 function = "gpio";
 133         };
 134 };
 135
 136 &pinctrl {
 137         phy_reset_pins: phy-reset {
 138                 gpio {
 139                         groups = "spi refclk";
 140                         function = "gpio";
 141                 };
 142         };
 143 };
 144
 145 &ethernet {
 146         pinctrl-names = "default";
 147         pinctrl-0 = <&rgmii1_pins &mdio_pins &phy_reset_pins>;
 148
 149         nvmem-cells = <&macaddr_factory_4 0>;
 150         nvmem-cell-names = "mac-address";
 151
 152         phy-reset-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
 153         phy-reset-duration = <30>;
 154
 155         port@5 {
 156                 status = "okay";
 157                 mediatek,fixed-link = <1000 1 1 1>;
 158                 phy-mode = "rgmii";
 159         };
 160
 161         mdio-bus {
 162                 status = "okay";
 163
 164                 phy0: ethernet-phy@0 {
 165                         status = "disabled";
 166                         reg = <0>;
 167                         phy-mode = "rgmii";
 168                 };
 169
 170                 phy1: ethernet-phy@1 {
 171                         status = "disabled";
 172                         reg = <1>;
 173                         phy-mode = "rgmii";
 174                 };
 175
 176                 phy2: ethernet-phy@2 {
 177                         status = "disabled";
 178                         reg = <2>;
 179                         phy-mode = "rgmii";
 180                 };
 181
 182                 phy3: ethernet-phy@3 {
 183                         status = "disabled";
 184                         reg = <3>;
 185                         phy-mode = "rgmii";
 186                 };
 187
 188                 phy4: ethernet-phy@4 {
 189                         status = "disabled";
 190                         reg = <4>;
 191                         phy-mode = "rgmii";
 192                 };
 193         };
 194 };
 195
 196 &gsw {
 197         mediatek,ephy-base = /bits/ 8 <8>;
 198 };
 199
 200 &wmac {
 201         nvmem-cells = <&eeprom_factory_0>, <&macaddr_factory_4 0>;
 202         nvmem-cell-names = "eeprom", "mac-address";
 203 };
 204
 205 &pcie {
 206         status = "okay";
 207 };
 208
 209 &pcie0 {
 210         wifi@0,0 {
 211                 reg = <0x0000 0 0 0 0>;
 212                 ieee80211-freq-limit = <5000000 6000000>;
 213                 nvmem-cells = <&eeprom_factory_8000>, <&macaddr_factory_4 2>;
 214                 nvmem-cell-names = "eeprom", "mac-address";
 215         };
 216 };