1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 #include "mt7620a.dtsi"
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/mtd/partitions/uimage.h>
10 compatible = "dlink,dwr-960", "ralink,mt7620a-soc";
11 model = "D-Link DWR-960";
14 led-boot = &led_status;
15 led-failsafe = &led_status;
16 led-running = &led_status;
17 led-upgrade = &led_status;
21 compatible = "gpio-keys";
25 gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
26 linux,code = <KEY_RESTART>;
31 gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
32 linux,code = <KEY_WPS_BUTTON>;
37 compatible = "gpio-leds";
40 label = "green:status";
41 gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
46 gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
51 gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
56 gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
60 label = "green:signal";
61 gpios = <&gpio2 0 GPIO_ACTIVE_HIGH>;
66 gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
71 gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
76 gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
80 label = "green:wlan5g";
81 gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
82 linux,default-trigger = "phy0tpt";
86 label = "green:wlan2g";
87 gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
88 linux,default-trigger = "phy1tpt";
94 pinctrl-names = "default";
95 pinctrl-0 = <&rgmii2_pins &mdio_pins>;
97 mediatek,portmap = "wllll";
101 phy-mode = "rgmii-txid";
102 phy-handle = <&phy7>;
108 phy7: ethernet-phy@7 {
110 phy-mode = "rgmii-id";
131 compatible = "jedec,spi-nor";
133 spi-max-frequency = <50000000>;
136 compatible = "fixed-partitions";
137 #address-cells = <1>;
147 compatible = "openwrt,uimage", "denx,uimage";
148 openwrt,ih-magic = <IH_MAGIC_OKLI>;
149 openwrt,offset = <0x10000>;
151 reg = <0x10000 0xfe0000>;
154 config: partition@ff0000 {
156 reg = <0xff0000 0x10000>;
177 compatible = "mediatek,mt76";
178 reg = <0x0000 0 0 0 0>;
179 ieee80211-freq-limit = <5000000 6000000>;
180 mediatek,mtd-eeprom = <&config 0xe08e>;
181 nvmem-cells = <&macaddr_config_e50e>;
182 nvmem-cell-names = "mac-address";
183 mac-address-increment = <2>;
189 groups = "i2c", "wled", "spi refclk", "uartf", "ephy";
195 compatible = "nvmem-cells";
196 #address-cells = <1>;
199 macaddr_config_e50e: macaddr@e50e {