target/linux/ramips/dts/mt7620a_dlink_dwr-118-a1.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include "mt7620a.dtsi"
   4
   5 #include <dt-bindings/gpio/gpio.h>
   6 #include <dt-bindings/input/input.h>
   7 #include <dt-bindings/leds/common.h>
   8 #include <dt-bindings/mtd/partitions/uimage.h>
   9
  10 / {
  11         compatible = "dlink,dwr-118-a1", "ralink,mt7620a-soc";
  12         model = "D-Link DWR-118 A1";
  13
  14         aliases {
  15                 led-boot = &led_internet;
  16                 led-failsafe = &led_internet;
  17                 led-upgrade = &led_internet;
  18         };
  19
  20         keys {
  21                 compatible = "gpio-keys";
  22
  23                 wps {
  24                         label = "wps";
  25                         gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
  26                         linux,code = <KEY_WPS_BUTTON>;
  27                 };
  28
  29                 reset {
  30                         label = "reset";
  31                         gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
  32                         linux,code = <KEY_RESTART>;
  33                 };
  34         };
  35
  36         leds {
  37                 compatible = "gpio-leds";
  38
  39                 wan {
  40                         function = LED_FUNCTION_WAN;
  41                         color = <LED_COLOR_ID_GREEN>;
  42                         gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
  43                 };
  44
  45                 led_internet: internet {
  46                         label = "green:internet";
  47                         gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
  48                 };
  49
  50                 lan {
  51                         function = LED_FUNCTION_LAN;
  52                         color = <LED_COLOR_ID_GREEN>;
  53                         gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
  54                 };
  55
  56                 wlan2g {
  57                         label = "green:wlan2g";
  58                         gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
  59                 };
  60
  61                 usb {
  62                         function = LED_FUNCTION_USB;
  63                         color = <LED_COLOR_ID_GREEN>;
  64                         gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
  65                         trigger-sources = <&ohci_port1>, <&ehci_port1>;
  66                         linux,default-trigger = "usbport";
  67                 };
  68         };
  69
  70         gpio_export {
  71                 compatible = "gpio-export";
  72                 #size-cells = <0>;
  73
  74                 usb {
  75                         gpio-export,name = "usb";
  76                         gpio-export,output = <0>;
  77                         gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
  78                 };
  79         };
  80 };
  81
  82 &gpio1 {
  83         status = "okay";
  84 };
  85
  86 &gpio2 {
  87         status = "okay";
  88 };
  89
  90 &gpio3 {
  91         status = "okay";
  92 };
  93
  94 &spi0 {
  95         status = "okay";
  96
  97         flash@0 {
  98                 compatible = "jedec,spi-nor";
  99                 reg = <0>;
 100                 spi-max-frequency = <80000000>;
 101
 102                 partitions {
 103                         compatible = "fixed-partitions";
 104                         #address-cells = <1>;
 105                         #size-cells = <1>;
 106
 107                         partition@0 {
 108                                 label = "jboot";
 109                                 reg = <0x0 0x10000>;
 110                                 read-only;
 111                         };
 112
 113                         partition@10000 {
 114                                 compatible = "openwrt,uimage", "denx,uimage";
 115                                 openwrt,ih-magic = <IH_MAGIC_OKLI>;
 116                                 openwrt,offset = <0x10000>;
 117                                 label = "firmware";
 118                                 reg = <0x10000 0xfe0000>;
 119                         };
 120
 121                         config: partition@ff0000 {
 122                                 label = "config";
 123                                 reg = <0xff0000 0x10000>;
 124                                 read-only;
 125
 126                                 nvmem-layout {
 127                                         compatible = "fixed-layout";
 128                                         #address-cells = <1>;
 129                                         #size-cells = <1>;
 130
 131                                         eeprom_config_e083: eeprom@e083 {
 132                                                 reg = <0xe083 0x200>;
 133                                         };
 134
 135                                         macaddr_config_e496: macaddr@e496 {
 136                                                 compatible = "mac-base";
 137                                                 reg = <0xe496 0x6>;
 138                                                 #nvmem-cell-cells = <1>;
 139                                         };
 140                                 };
 141                         };
 142                 };
 143         };
 144 };
 145
 146 &ehci {
 147         status = "okay";
 148 };
 149
 150 &ohci {
 151         status = "okay";
 152 };
 153
 154 &state_default {
 155         default {
 156                 groups = "ephy", "uartf", "spi refclk", "wled";
 157                 function = "gpio";
 158         };
 159 };
 160
 161 &pcie {
 162         status = "okay";
 163 };
 164
 165 &pcie0 {
 166         wifi@0,0 {
 167                 reg = <0x0000 0 0 0 0>;
 168                 nvmem-cells = <&eeprom_config_e083>, <&macaddr_config_e496 2>;
 169                 nvmem-cell-names = "eeprom", "mac-address";
 170
 171                 led {
 172                         led-sources = <0>;
 173                         led-active-low;
 174                 };
 175         };
 176 };
 177
 178 &ethernet {
 179         pinctrl-names = "default";
 180         pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>;
 181
 182         port@4 {
 183                 status = "okay";
 184                 phy-handle = <&phy4>;
 185                 phy-mode = "rgmii";
 186         };
 187
 188         port@5 {
 189                 status = "okay";
 190                 phy-handle = <&phy5>;
 191                 phy-mode = "rgmii";
 192         };
 193
 194         mdio-bus {
 195                 status = "okay";
 196
 197                 phy4: ethernet-phy@4 {
 198                         reg = <4>;
 199                         phy-mode = "rgmii-rxid";
 200                 };
 201
 202                 phy5: ethernet-phy@5 {
 203                         reg = <5>;
 204                         phy-mode = "rgmii-rxid";
 205                 };
 206         };
 207 };
 208
 209 &gsw {
 210         mediatek,port4-gmac;
 211         mediatek,ephy-base = /bits/ 8 <8>;
 212 };