target/linux/ramips/dts/mt7620a.dtsi

   1 /dts-v1/;
   2
   3 / {
   4         #address-cells = <1>;
   5         #size-cells = <1>;
   6         compatible = "ralink,mt7620a-soc";
   7
   8         aliases {
   9                 spi0 = &spi0;
  10                 spi1 = &spi1;
  11                 serial0 = &uartlite;
  12         };
  13
  14         cpus {
  15                 #address-cells = <1>;
  16                 #size-cells = <0>;
  17
  18                 cpu@0 {
  19                         compatible = "mips,mips24KEc";
  20                         reg = <0>;
  21                 };
  22         };
  23
  24         chosen {
  25                 bootargs = "console=ttyS0,57600";
  26         };
  27
  28         cpuintc: cpuintc {
  29                 #address-cells = <0>;
  30                 #interrupt-cells = <1>;
  31                 interrupt-controller;
  32                 compatible = "mti,cpu-interrupt-controller";
  33         };
  34
  35         palmbus: palmbus@10000000 {
  36                 compatible = "palmbus";
  37                 reg = <0x10000000 0x200000>;
  38                 ranges = <0x0 0x10000000 0x1FFFFF>;
  39
  40                 #address-cells = <1>;
  41                 #size-cells = <1>;
  42
  43                 sysc: syscon@0 {
  44                         compatible = "ralink,mt7620-sysc", "syscon";
  45                         reg = <0x0 0x100>;
  46                         #clock-cells = <1>;
  47                         #reset-cells = <1>;
  48                 };
  49
  50                 timer: timer@100 {
  51                         compatible = "ralink,mt7620a-timer", "ralink,rt2880-timer";
  52                         reg = <0x100 0x20>;
  53
  54                         clocks = <&sysc 5>;
  55
  56                         interrupt-parent = <&intc>;
  57                         interrupts = <1>;
  58                 };
  59
  60                 watchdog: watchdog@120 {
  61                         compatible = "ralink,mt7620a-wdt", "ralink,rt2880-wdt";
  62                         reg = <0x120 0x10>;
  63
  64                         clocks = <&sysc 6>;
  65
  66                         resets = <&sysc 8>;
  67                         reset-names = "wdt";
  68
  69                         interrupt-parent = <&intc>;
  70                         interrupts = <1>;
  71                 };
  72
  73                 intc: intc@200 {
  74                         compatible = "ralink,mt7620a-intc", "ralink,rt2880-intc";
  75                         reg = <0x200 0x100>;
  76
  77                         resets = <&sysc 19>;
  78                         reset-names = "intc";
  79
  80                         interrupt-controller;
  81                         #interrupt-cells = <1>;
  82
  83                         interrupt-parent = <&cpuintc>;
  84                         interrupts = <2>;
  85                 };
  86
  87                 memc: memc@300 {
  88                         compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
  89                         reg = <0x300 0x100>;
  90
  91                         resets = <&sysc 20>;
  92                         reset-names = "mc";
  93
  94                         interrupt-parent = <&intc>;
  95                         interrupts = <3>;
  96                 };
  97
  98                 uart: uart@500 {
  99                         compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
 100                         reg = <0x500 0x100>;
 101
 102                         clocks = <&sysc 7>;
 103
 104                         resets = <&sysc 12>;
 105
 106                         interrupt-parent = <&intc>;
 107                         interrupts = <5>;
 108
 109                         reg-shift = <2>;
 110
 111                         status = "disabled";
 112                 };
 113
 114                 gpio0: gpio@600 {
 115                         compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
 116                         reg = <0x600 0x34>;
 117
 118                         resets = <&sysc 13>;
 119                         reset-names = "pio";
 120
 121                         interrupt-parent = <&intc>;
 122                         interrupts = <6>;
 123
 124                         gpio-controller;
 125                         #gpio-cells = <2>;
 126
 127                         ngpios = <24>;
 128                         ralink,gpio-base = <0>;
 129                         ralink,register-map = [ 00 04 08 0c
 130                                                 20 24 28 2c
 131                                                 30 34 ];
 132                 };
 133
 134                 gpio1: gpio@638 {
 135                         compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
 136                         reg = <0x638 0x24>;
 137
 138                         interrupt-parent = <&intc>;
 139                         interrupts = <6>;
 140
 141                         gpio-controller;
 142                         #gpio-cells = <2>;
 143
 144                         ngpios = <16>;
 145                         ralink,gpio-base = <24>;
 146                         ralink,register-map = [ 00 04 08 0c
 147                                                 10 14 18 1c
 148                                                 20 24 ];
 149
 150                         status = "disabled";
 151                 };
 152
 153                 gpio2: gpio@660 {
 154                         compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
 155                         reg = <0x660 0x24>;
 156
 157                         interrupt-parent = <&intc>;
 158                         interrupts = <6>;
 159
 160                         gpio-controller;
 161                         #gpio-cells = <2>;
 162
 163                         ngpios = <32>;
 164                         ralink,gpio-base = <40>;
 165                         ralink,register-map = [ 00 04 08 0c
 166                                                 10 14 18 1c
 167                                                 20 24 ];
 168
 169                         status = "disabled";
 170                 };
 171
 172                 gpio3: gpio@688 {
 173                         compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
 174                         reg = <0x688 0x24>;
 175
 176                         interrupt-parent = <&intc>;
 177                         interrupts = <6>;
 178
 179                         gpio-controller;
 180                         #gpio-cells = <2>;
 181
 182                         ngpios = <1>;
 183                         ralink,gpio-base = <72>;
 184                         ralink,register-map = [ 00 04 08 0c
 185                                                 10 14 18 1c
 186                                                 20 24 ];
 187
 188                         status = "disabled";
 189                 };
 190
 191                 i2c: i2c@900 {
 192                         compatible = "ralink,rt2880-i2c";
 193                         reg = <0x900 0x100>;
 194
 195                         clocks = <&sysc 8>;
 196
 197                         resets = <&sysc 16>;
 198                         reset-names = "i2c";
 199
 200                         #address-cells = <1>;
 201                         #size-cells = <0>;
 202
 203                         status = "disabled";
 204
 205                         pinctrl-names = "default";
 206                         pinctrl-0 = <&i2c_pins>;
 207                 };
 208
 209                 i2s: i2s@a00 {
 210                         compatible = "mediatek,mt7620-i2s";
 211                         reg = <0xa00 0x100>;
 212
 213                         clocks = <&sysc 9>;
 214
 215                         resets = <&sysc 17>;
 216                         reset-names = "i2s";
 217
 218                         interrupt-parent = <&intc>;
 219                         interrupts = <10>;
 220
 221                         txdma-req = <2>;
 222                         rxdma-req = <3>;
 223
 224                         dmas = <&gdma 4>,
 225                                 <&gdma 6>;
 226                         dma-names = "tx", "rx";
 227
 228                         status = "disabled";
 229                 };
 230
 231                 spi0: spi@b00 {
 232                         compatible = "ralink,mt7620a-spi", "ralink,rt2880-spi";
 233                         reg = <0xb00 0x40>;
 234
 235                         clocks = <&sysc 10>;
 236
 237                         resets = <&sysc 18>;
 238                         reset-names = "spi";
 239
 240                         #address-cells = <1>;
 241                         #size-cells = <0>;
 242
 243                         status = "disabled";
 244
 245                         pinctrl-names = "default";
 246                         pinctrl-0 = <&spi_pins>;
 247                 };
 248
 249                 spi1: spi@b40 {
 250                         compatible = "ralink,rt2880-spi";
 251                         reg = <0xb40 0x60>;
 252
 253                         clocks = <&sysc 11>;
 254
 255                         resets = <&sysc 18>;
 256                         reset-names = "spi";
 257
 258                         #address-cells = <1>;
 259                         #size-cells = <0>;
 260
 261                         status = "disabled";
 262
 263                         pinctrl-names = "default";
 264                         pinctrl-0 = <&spi_cs1>;
 265                 };
 266
 267                 uartlite: uartlite@c00 {
 268                         compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
 269                         reg = <0xc00 0x100>;
 270
 271                         clocks = <&sysc 12>;
 272
 273                         resets = <&sysc 19>;
 274
 275                         interrupt-parent = <&intc>;
 276                         interrupts = <12>;
 277
 278                         reg-shift = <2>;
 279
 280                         pinctrl-names = "default";
 281                         pinctrl-0 = <&uartlite_pins>;
 282                 };
 283
 284                 systick: systick@d00 {
 285                         compatible = "ralink,mt7620a-systick", "ralink,cevt-systick";
 286                         reg = <0xd00 0x10>;
 287
 288                         resets = <&sysc 28>;
 289                         reset-names = "intc";
 290
 291                         interrupt-parent = <&cpuintc>;
 292                         interrupts = <7>;
 293                 };
 294
 295                 pcm: pcm@2000 {
 296                         compatible = "ralink,mt7620a-pcm";
 297                         reg = <0x2000 0x800>;
 298
 299                         resets = <&sysc 11>;
 300                         reset-names = "pcm";
 301
 302                         interrupt-parent = <&intc>;
 303                         interrupts = <4>;
 304
 305                         status = "disabled";
 306                 };
 307
 308                 gdma: gdma@2800 {
 309                         compatible = "ralink,mt7620a-gdma", "ralink,rt3883-gdma";
 310                         reg = <0x2800 0x800>;
 311
 312                         resets = <&sysc 14>;
 313                         reset-names = "dma";
 314
 315                         interrupt-parent = <&intc>;
 316                         interrupts = <7>;
 317
 318                         #dma-cells = <1>;
 319                         #dma-channels = <16>;
 320                         #dma-requests = <16>;
 321
 322                         status = "disabled";
 323                 };
 324         };
 325
 326         pinctrl: pinctrl {
 327                 compatible = "ralink,rt2880-pinmux";
 328                 pinctrl-names = "default";
 329                 pinctrl-0 = <&state_default>;
 330
 331                 state_default: pinctrl0 {
 332                 };
 333
 334                 pcm_i2s_pins: pcm_i2s {
 335                         pcm_i2s {
 336                                 groups = "uartf";
 337                                 function = "pcm i2s";
 338                         };
 339                 };
 340
 341                 uartf_gpio_pins: uartf_gpio {
 342                         uartf_gpio {
 343                                 groups = "uartf";
 344                                 function = "gpio uartf";
 345                         };
 346                 };
 347
 348                 gpio_i2s_pins: gpio_i2s {
 349                         gpio_i2s {
 350                                 groups = "uartf";
 351                                 function = "gpio i2s";
 352                         };
 353                 };
 354
 355                 spi_pins: spi_pins {
 356                         spi_pins {
 357                                 groups = "spi";
 358                                 function = "spi";
 359                         };
 360                 };
 361
 362                 spi_cs1: spi1 {
 363                         spi1 {
 364                                 groups = "spi refclk";
 365                                 function = "spi refclk";
 366                         };
 367                 };
 368
 369                 i2c_pins: i2c_pins {
 370                         i2c_pins {
 371                                 groups = "i2c";
 372                                 function = "i2c";
 373                         };
 374                 };
 375
 376                 uartlite_pins: uartlite {
 377                         uart {
 378                                 groups = "uartlite";
 379                                 function = "uartlite";
 380                         };
 381                 };
 382
 383                 mdio_pins: mdio {
 384                         mdio {
 385                                 groups = "mdio";
 386                                 function = "mdio";
 387                         };
 388                 };
 389
 390                 mdio_refclk_pins: mdio_refclk {
 391                         mdio_refclk {
 392                                 groups = "mdio";
 393                                 function = "refclk";
 394                         };
 395                 };
 396
 397                 ephy_pins: ephy {
 398                         ephy {
 399                                 groups = "ephy";
 400                                 function = "ephy";
 401                         };
 402                 };
 403
 404                 wled_pins: wled {
 405                         wled {
 406                                 groups = "wled";
 407                                 function = "wled";
 408                         };
 409                 };
 410
 411                 rgmii1_pins: rgmii1 {
 412                         rgmii1 {
 413                                 groups = "rgmii1";
 414                                 function = "rgmii1";
 415                         };
 416                 };
 417
 418                 rgmii2_pins: rgmii2 {
 419                         rgmii2 {
 420                                 groups = "rgmii2";
 421                                 function = "rgmii2";
 422                         };
 423                 };
 424
 425                 pcie_pins: pcie {
 426                         pcie {
 427                                 groups = "pcie";
 428                                 function = "pcie rst";
 429                         };
 430                 };
 431
 432                 pa_pins: pa {
 433                         pa {
 434                                 groups = "pa";
 435                                 function = "pa";
 436                         };
 437                 };
 438
 439                 pa_gpio_pins: pa_gpio {
 440                         pa {
 441                                 groups = "pa";
 442                                 function = "gpio";
 443                         };
 444                 };
 445
 446                 sdhci_pins: sdhci {
 447                         sdhci {
 448                                 groups = "nd_sd";
 449                                 function = "sd";
 450                         };
 451                 };
 452         };
 453
 454         usbphy: usbphy {
 455                 compatible = "mediatek,mt7620-usbphy";
 456                 #phy-cells = <0>;
 457
 458                 ralink,sysctl = <&sysc>;
 459                 /* usb phy reset is only controled by RSTCTRL bit 25 */
 460                 resets = <&sysc 25>, <&sysc 22>;
 461                 reset-names = "host", "device";
 462         };
 463
 464         ethernet: ethernet@10100000 {
 465                 compatible = "mediatek,mt7620-eth";
 466                 reg = <0x10100000 0x10000>;
 467
 468                 #address-cells = <1>;
 469                 #size-cells = <0>;
 470
 471                 interrupt-parent = <&cpuintc>;
 472                 interrupts = <5>;
 473
 474                 resets = <&sysc 21>, <&sysc 23>;
 475                 reset-names = "fe", "esw";
 476
 477                 mediatek,switch = <&gsw>;
 478
 479                 port@4 {
 480                         compatible = "mediatek,mt7620a-gsw-port", "mediatek,eth-port";
 481                         reg = <4>;
 482
 483                         status = "disabled";
 484                 };
 485
 486                 port@5 {
 487                         compatible = "mediatek,mt7620a-gsw-port", "mediatek,eth-port";
 488                         reg = <5>;
 489
 490                         status = "disabled";
 491                 };
 492
 493                 mdio-bus {
 494                         #address-cells = <1>;
 495                         #size-cells = <0>;
 496
 497                         status = "disabled";
 498                 };
 499         };
 500
 501         gsw: gsw@10110000 {
 502                 compatible = "mediatek,mt7620-gsw";
 503                 reg = <0x10110000 0x8000>;
 504
 505                 resets = <&sysc 23>;
 506                 reset-names = "esw";
 507
 508                 interrupt-parent = <&intc>;
 509                 interrupts = <17>;
 510         };
 511
 512         sdhci: sdhci@10130000 {
 513                 compatible = "ralink,mt7620-sdhci";
 514                 reg = <0x10130000 0x4000>;
 515
 516                 interrupt-parent = <&intc>;
 517                 interrupts = <14>;
 518
 519                 pinctrl-names = "default";
 520                 pinctrl-0 = <&sdhci_pins>;
 521
 522                 status = "disabled";
 523         };
 524
 525         ehci: ehci@101c0000 {
 526                 #address-cells = <1>;
 527                 #size-cells = <0>;
 528                 compatible = "generic-ehci";
 529                 reg = <0x101c0000 0x1000>;
 530
 531                 interrupt-parent = <&intc>;
 532                 interrupts = <18>;
 533
 534                 phys = <&usbphy>;
 535                 phy-names = "usb";
 536
 537                 status = "disabled";
 538
 539                 ehci_port1: port@1 {
 540                         reg = <1>;
 541                         #trigger-source-cells = <0>;
 542                 };
 543         };
 544
 545         ohci: ohci@101c1000 {
 546                 #address-cells = <1>;
 547                 #size-cells = <0>;
 548                 compatible = "generic-ohci";
 549                 reg = <0x101c1000 0x1000>;
 550
 551                 interrupt-parent = <&intc>;
 552                 interrupts = <18>;
 553
 554                 phys = <&usbphy>;
 555                 phy-names = "usb";
 556
 557                 status = "disabled";
 558
 559                 ohci_port1: port@1 {
 560                         reg = <1>;
 561                         #trigger-source-cells = <0>;
 562                 };
 563         };
 564
 565         pcie: pcie@10140000 {
 566                 compatible = "mediatek,mt7620-pci";
 567                 reg = <0x10140000 0x100
 568                         0x10142000 0x100>;
 569
 570                 #address-cells = <3>;
 571                 #size-cells = <2>;
 572
 573                 resets = <&sysc 26>;
 574                 reset-names = "pcie0";
 575
 576                 interrupt-parent = <&cpuintc>;
 577                 interrupts = <4>;
 578
 579                 pinctrl-names = "default";
 580                 pinctrl-0 = <&pcie_pins>;
 581
 582                 device_type = "pci";
 583
 584                 bus-range = <0 255>;
 585                 ranges = <
 586                         0x02000000 0 0x00000000 0x20000000 0 0x10000000 /* pci memory */
 587                         0x01000000 0 0x00000000 0x10160000 0 0x00010000 /* io space */
 588                 >;
 589
 590                 status = "disabled";
 591
 592                 pcie0: pcie@0,0 {
 593                         reg = <0x0000 0 0 0 0>;
 594
 595                         #address-cells = <3>;
 596                         #size-cells = <2>;
 597
 598                         device_type = "pci";
 599
 600                         ranges;
 601                 };
 602         };
 603
 604         wmac: wmac@10180000 {
 605                 compatible = "ralink,rt7620-wmac", "ralink,rt2880-wmac";
 606                 reg = <0x10180000 0x40000>;
 607
 608                 clocks = <&sysc 13>;
 609
 610                 interrupt-parent = <&cpuintc>;
 611                 interrupts = <6>;
 612
 613                 ralink,eeprom = "soc_wmac.eeprom";
 614         };
 615 };