1525726640b78abeddfcff68c8f250f3c5b8118b
[openwrt/staging/stintel.git] / target / linux / qualcommax / patches-6.6 / 0062-v6.8-arm64-dts-qcom-ipq8074-Add-QUP4-SPI-node.patch
1 From 6a25e70214fde6dcf900271c819c8d7fe7b9a4b0 Mon Sep 17 00:00:00 2001
2 From: Robert Marko <robimarko@gmail.com>
3 Date: Thu, 23 Nov 2023 13:12:54 +0100
4 Subject: [PATCH] arm64: dts: qcom: ipq8074: Add QUP4 SPI node
5
6 Add node to support the QUP4 SPI controller inside of IPQ8074.
7 Some devices use this bus to communicate to a Bluetooth controller.
8
9 Signed-off-by: Robert Marko <robimarko@gmail.com>
10 Link: https://lore.kernel.org/r/20231123121324.1046164-1-robimarko@gmail.com
11 Signed-off-by: Bjorn Andersson <andersson@kernel.org>
12 ---
13 arch/arm64/boot/dts/qcom/ipq8074.dtsi | 14 ++++++++++++++
14 1 file changed, 14 insertions(+)
15
16 --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
17 +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
18 @@ -529,6 +529,20 @@
19 status = "disabled";
20 };
21
22 + blsp1_spi4: spi@78b8000 {
23 + compatible = "qcom,spi-qup-v2.2.1";
24 + #address-cells = <1>;
25 + #size-cells = <0>;
26 + reg = <0x78b8000 0x600>;
27 + interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
28 + clocks = <&gcc GCC_BLSP1_QUP4_SPI_APPS_CLK>,
29 + <&gcc GCC_BLSP1_AHB_CLK>;
30 + clock-names = "core", "iface";
31 + dmas = <&blsp_dma 18>, <&blsp_dma 19>;
32 + dma-names = "tx", "rx";
33 + status = "disabled";
34 + };
35 +
36 blsp1_i2c5: i2c@78b9000 {
37 compatible = "qcom,i2c-qup-v2.2.1";
38 #address-cells = <1>;