target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8074-rax120v2.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 /dts-v1/;
   4
   5 #include "ipq8074.dtsi"
   6 #include "ipq8074-ess.dtsi"
   7 #include "ipq8074-hk-cpu.dtsi"
   8 #include <dt-bindings/input/input.h>
   9 #include <dt-bindings/gpio/gpio.h>
  10 #include <dt-bindings/leds/common.h>
  11
  12 / {
  13         model = "Netgear RAX120v2";
  14         compatible = "netgear,rax120v2", "qcom,ipq8074";
  15
  16         aliases {
  17                 serial0 = &blsp1_uart5;
  18
  19                 led-running = &led_system_white;
  20                 led-upgrade = &led_system_white;
  21                 led-internet = &led_wan_white;
  22                 label-mac-device = &dp1;
  23         };
  24
  25         chosen {
  26                 stdout-path = "serial0:115200n8";
  27                 bootargs-append = " ubi.mtd=rootfs root=/dev/ubiblock0_0";
  28         };
  29
  30         keys {
  31                 compatible = "gpio-keys";
  32
  33                 rfkill {
  34                         label = "rfkill";
  35                         gpios = <&tlmm 25 GPIO_ACTIVE_LOW>;
  36                         linux,code = <KEY_RFKILL>;
  37                 };
  38
  39                 wps {
  40                         label = "wps";
  41                         gpios = <&tlmm 57 GPIO_ACTIVE_LOW>;
  42                         linux,code = <KEY_WPS_BUTTON>;
  43                 };
  44
  45                 reset {
  46                         label = "reset";
  47                         gpios = <&tlmm 54 GPIO_ACTIVE_LOW>;
  48                         linux,code = <KEY_RESTART>;
  49                 };
  50         };
  51
  52         led_spi {
  53                 compatible = "spi-gpio";
  54                 #address-cells = <1>;
  55                 #size-cells = <0>;
  56
  57                 sck-gpios = <&tlmm 18 GPIO_ACTIVE_HIGH>;
  58                 mosi-gpios = <&tlmm 19 GPIO_ACTIVE_HIGH>;
  59
  60                 led_gpio: led_gpio@0 {
  61                         compatible = "fairchild,74hc595";
  62                         reg = <0>;
  63                         gpio-controller;
  64                         #gpio-cells = <2>;
  65                         registers-number = <2>;
  66                         enable-gpios = <&tlmm 20 GPIO_ACTIVE_HIGH>;
  67                         spi-max-frequency = <1000000>;
  68                 };
  69         };
  70
  71         leds {
  72                 compatible = "gpio-leds";
  73
  74                 led_system_white: system-white {
  75                         gpios = <&led_gpio 0 GPIO_ACTIVE_LOW>;
  76                         color = <LED_COLOR_ID_WHITE>;
  77                 };
  78
  79                 led_24g_white {
  80                         gpios = <&led_gpio 1 GPIO_ACTIVE_LOW>;
  81                         color = <LED_COLOR_ID_WHITE>;
  82                         linux,default-trigger = "phy1radio";
  83                 };
  84
  85                 led_5g_white {
  86                         gpios = <&led_gpio 2 GPIO_ACTIVE_LOW>;
  87                         color = <LED_COLOR_ID_WHITE>;
  88                         linux,default-trigger = "phy0radio";
  89                 };
  90
  91                 led_usb1_white {
  92                         gpios = <&led_gpio 3 GPIO_ACTIVE_LOW>;
  93                         color = <LED_COLOR_ID_WHITE>;
  94                 };
  95
  96                 led_usb2_white {
  97                         gpios = <&led_gpio 4 GPIO_ACTIVE_LOW>;
  98                         color = <LED_COLOR_ID_WHITE>;
  99                 };
 100
 101                 led_wan_white: wan-white {
 102                         gpios = <&led_gpio 5 GPIO_ACTIVE_LOW>;
 103                         color = <LED_COLOR_ID_WHITE>;
 104                 };
 105
 106                 led_aqr_green {
 107                         gpios = <&led_gpio 6 GPIO_ACTIVE_LOW>;
 108                         color = <LED_COLOR_ID_GREEN>;
 109                 };
 110
 111                 led_aqr_red {
 112                         gpios = <&led_gpio 10 GPIO_ACTIVE_LOW>;
 113                         color = <LED_COLOR_ID_RED>;
 114                 };
 115
 116                 led_aqr_white {
 117                         gpios = <&led_gpio 11 GPIO_ACTIVE_LOW>;
 118                         color = <LED_COLOR_ID_WHITE>;
 119                 };
 120
 121                 led_wps_white {
 122                         gpios = <&tlmm 40 GPIO_ACTIVE_HIGH>;
 123                         color = <LED_COLOR_ID_WHITE>;
 124                 };
 125         };
 126 };
 127
 128 &tlmm {
 129         mdio_pins: mdio-pins {
 130                 mdc {
 131                         pins = "gpio68";
 132                         function = "mdc";
 133                         drive-strength = <8>;
 134                         bias-pull-up;
 135                 };
 136
 137                 mdio {
 138                         pins = "gpio69";
 139                         function = "mdio";
 140                         drive-strength = <8>;
 141                         bias-pull-up;
 142                 };
 143         };
 144 };
 145
 146 &mdio {
 147         status = "okay";
 148
 149         pinctrl-0 = <&mdio_pins>;
 150         pinctrl-names = "default";
 151         reset-gpios = <&tlmm 37 GPIO_ACTIVE_LOW>;
 152
 153         qca8075_0: ethernet-phy@0 {
 154                 compatible = "ethernet-phy-ieee802.3-c22";
 155                 reg = <0>;
 156         };
 157
 158         qca8075_1: ethernet-phy@1 {
 159                 compatible = "ethernet-phy-ieee802.3-c22";
 160                 reg = <1>;
 161         };
 162
 163         qca8075_2: ethernet-phy@2 {
 164                 compatible = "ethernet-phy-ieee802.3-c22";
 165                 reg = <2>;
 166         };
 167
 168         qca8075_3: ethernet-phy@3 {
 169                 compatible = "ethernet-phy-ieee802.3-c22";
 170                 reg = <3>;
 171         };
 172
 173         qca8075_4: ethernet-phy@4 {
 174                 compatible = "ethernet-phy-ieee802.3-c22";
 175                 reg = <4>;
 176         };
 177
 178         aqr111b0: ethernet-phy@7 {
 179                 compatible ="ethernet-phy-ieee802.3-c45";
 180                 reg = <7>;
 181                 reset-gpios = <&tlmm 59 GPIO_ACTIVE_LOW>;
 182         };
 183 };
 184
 185 &switch {
 186         status = "okay";
 187
 188         switch_lan_bmp = <(ESS_PORT1 | ESS_PORT2 | ESS_PORT3 | ESS_PORT4 | ESS_PORT6)>; /* lan port bitmap */
 189         switch_wan_bmp = <ESS_PORT5>; /* wan port bitmap */
 190         switch_mac_mode = <MAC_MODE_PSGMII>; /* mac mode for uniphy instance0*/
 191         switch_mac_mode2 = <MAC_MODE_USXGMII>; /* mac mode for uniphy instance2*/
 192
 193         qcom,port_phyinfo {
 194                 port@1 {
 195                         port_id = <1>;
 196                         phy_address = <0>;
 197                 };
 198                 port@2 {
 199                         port_id = <2>;
 200                         phy_address = <1>;
 201                 };
 202                 port@3 {
 203                         port_id = <3>;
 204                         phy_address = <2>;
 205                 };
 206                 port@4 {
 207                         port_id = <4>;
 208                         phy_address = <3>;
 209                 };
 210                 port@5 {
 211                         port_id = <5>;
 212                         phy_address = <4>;
 213                 };
 214                 port@6 {
 215                         port_id = <6>;
 216                         phy_address = <7>;
 217                         compatible = "ethernet-phy-ieee802.3-c45";
 218                         ethernet-phy-ieee802.3-c45;
 219                 };
 220         };
 221 };
 222
 223 &edma {
 224         status = "okay";
 225 };
 226
 227 &dp1 {
 228         status = "okay";
 229         phy-handle = <&qca8075_0>;
 230         label = "lan4";
 231         nvmem-cells = <&macaddr_dp1>;
 232         nvmem-cell-names = "mac-address";
 233 };
 234
 235 &dp2 {
 236         status = "okay";
 237         phy-handle = <&qca8075_1>;
 238         label = "lan3";
 239         nvmem-cells = <&macaddr_dp2>;
 240         nvmem-cell-names = "mac-address";
 241 };
 242
 243 &dp3 {
 244         status = "okay";
 245         phy-handle = <&qca8075_2>;
 246         label = "lan2";
 247         nvmem-cells = <&macaddr_dp3>;
 248         nvmem-cell-names = "mac-address";
 249 };
 250
 251 &dp4 {
 252         status = "okay";
 253         phy-handle = <&qca8075_3>;
 254         label = "lan1";
 255         nvmem-cells = <&macaddr_dp4>;
 256         nvmem-cell-names = "mac-address";
 257 };
 258
 259 &dp5 {
 260         status = "okay";
 261         phy-handle = <&qca8075_4>;
 262         label = "wan";
 263         nvmem-cells = <&macaddr_dp5>;
 264         nvmem-cell-names = "mac-address";
 265 };
 266
 267 &dp6_syn {
 268         status = "okay";
 269         phy-handle = <&aqr111b0>;
 270         label = "lan5";
 271         nvmem-cells = <&macaddr_dp6_syn>;
 272         nvmem-cell-names = "mac-address";
 273 };
 274
 275 &blsp1_uart5 {
 276         status = "okay";
 277 };
 278
 279 &blsp1_i2c2 {
 280         status = "okay";
 281
 282         g761@3e {
 283                 compatible = "gmt,g763";
 284                 reg = <0x3e>;
 285                 clocks =<&sleep_clk>;
 286                 fan_gear_mode = <0>;
 287                 fan_start = <1>;
 288                 pwm_polarity = <0>;
 289         };
 290 };
 291
 292 &qpic_bam {
 293         status = "okay";
 294 };
 295
 296 &qpic_nand {
 297         status = "okay";
 298
 299         nand@0 {
 300                 reg = <0>;
 301                 nand-ecc-strength = <4>;
 302                 nand-ecc-step-size = <512>;
 303                 nand-bus-width = <8>;
 304
 305                 partitions {
 306                         compatible = "fixed-partitions";
 307                         #address-cells = <1>;
 308                         #size-cells = <1>;
 309
 310                         partition@0 {
 311                                 label = "0:sbl1";
 312                                 reg = <0x00 0x100000>;
 313                                 read-only;
 314                         };
 315
 316                         partition@100000 {
 317                                 label = "0:mibib";
 318                                 reg = <0x100000 0x100000>;
 319                                 read-only;
 320                         };
 321
 322                         partition@200000 {
 323                                 label = "0:bootconfig";
 324                                 reg = <0x200000 0x80000>;
 325                                 read-only;
 326                         };
 327
 328                         partition@280000 {
 329                                 label = "0:bootconfig_1";
 330                                 reg = <0x280000 0x80000>;
 331                                 read-only;
 332                         };
 333
 334                         partition@300000 {
 335                                 label = "0:qsee";
 336                                 reg = <0x300000 0x300000>;
 337                                 read-only;
 338                         };
 339
 340                         partition@600000 {
 341                                 label = "0:qsee_1";
 342                                 reg = <0x600000 0x300000>;
 343                                 read-only;
 344                         };
 345
 346                         partition@900000 {
 347                                 label = "0:devcfg";
 348                                 reg = <0x900000 0x80000>;
 349                                 read-only;
 350                         };
 351
 352                         partition@980000 {
 353                                 label = "0:devcfg_1";
 354                                 reg = <0x980000 0x80000>;
 355                                 read-only;
 356                         };
 357
 358                         partition@a00000 {
 359                                 label = "0:apdp";
 360                                 reg = <0xa00000 0x80000>;
 361                                 read-only;
 362                         };
 363
 364                         partition@a80000 {
 365                                 label = "0:apdp_1";
 366                                 reg = <0xa80000 0x80000>;
 367                                 read-only;
 368                         };
 369
 370                         partition@b00000 {
 371                                 label = "0:rpm";
 372                                 reg = <0xb00000 0x80000>;
 373                                 read-only;
 374                         };
 375
 376                         partition@b80000 {
 377                                 label = "0:rpm_1";
 378                                 reg = <0xb80000 0x80000>;
 379                                 read-only;
 380                         };
 381
 382                         partition@c00000 {
 383                                 label = "0:cdt";
 384                                 reg = <0xc00000 0x80000>;
 385                                 read-only;
 386                         };
 387
 388                         partition@c80000 {
 389                                 label = "0:cdt_1";
 390                                 reg = <0xc80000 0x80000>;
 391                                 read-only;
 392                         };
 393
 394                         partition@d00000 {
 395                                 label = "0:appsblenv";
 396                                 reg = <0xd00000 0x80000>;
 397                         };
 398
 399                         partition@d80000 {
 400                                 label = "0:appsbl";
 401                                 reg = <0xd80000 0x100000>;
 402                                 read-only;
 403                         };
 404
 405                         partition@e80000 {
 406                                 label = "0:appsbl_1";
 407                                 reg = <0xe80000 0x100000>;
 408                                 read-only;
 409                         };
 410
 411                         partition@f80000 {
 412                                 label = "0:art";
 413                                 reg = <0xf80000 0x80000>;
 414                                 read-only;
 415                         };
 416
 417                         partition@1000000 {
 418                                 label = "0:art.bak";
 419                                 reg = <0x1000000 0x0080000>;
 420                                 read-only;
 421                         };
 422
 423                         partition@1080000 {
 424                                 label = "config";
 425                                 reg = <0x1080000 0x0100000>;
 426                                 read-only;
 427                         };
 428
 429                         partition@1180000 {
 430                                 label = "boarddata1";
 431                                 reg = <0x1180000 0x0100000>;
 432                                 read-only;
 433
 434                                 nvmem-layout {
 435                                         compatible = "fixed-layout";
 436                                         #address-cells = <1>;
 437                                         #size-cells = <1>;
 438
 439                                         macaddr_dp1: macaddr@0 {
 440                                                 reg = <0x0 0x6>;
 441                                         };
 442
 443                                         macaddr_dp2: macaddr@1 {
 444                                                 reg = <0x6 0x6>;
 445                                         };
 446
 447                                         macaddr_dp3: macaddr@2 {
 448                                                 reg = <0xc 0x6>;
 449                                         };
 450
 451                                         macaddr_dp4: macaddr@3 {
 452                                                 reg = <0x12 0x6>;
 453                                         };
 454
 455                                         macaddr_dp5: macaddr@4 {
 456                                                 reg = <0x18 0x6>;
 457                                         };
 458
 459                                         macaddr_dp6_syn: macaddr@5 {
 460                                                 reg = <0x1e 0x6>;
 461                                         };
 462                                 };
 463                         };
 464
 465                         partition@1280000 {
 466                                 label = "boarddata2";
 467                                 reg = <0x1280000 0x0100000>;
 468                                 read-only;
 469                         };
 470
 471                         partition@1380000 {
 472                                 label = "pot";
 473                                 reg = <0x1380000 0x0100000>;
 474                                 read-only;
 475                         };
 476
 477                         partition@1480000 {
 478                                 label = "dnidata";
 479                                 reg = <0x1480000 0x0500000>;
 480                                 read-only;
 481                         };
 482
 483                         partition@1980000 {
 484                                 label = "kernel";
 485                                 reg = <0x1980000 0x1d00000>;
 486                         };
 487
 488                         partition@7e00000 {
 489                                 label = "ethphyfw";
 490                                 reg = <0x7e00000 0x80000>;
 491                         };
 492
 493                         partition@e8800000 {
 494                                 label = "rootfs";
 495                                 reg = <0xe880000 0x11780000>;
 496                         };
 497                 };
 498         };
 499 };
 500
 501 &qusb_phy_0 {
 502         status = "okay";
 503 };
 504
 505 &qusb_phy_1 {
 506         status = "okay";
 507 };
 508
 509 &ssphy_0 {
 510         status = "okay";
 511 };
 512
 513 &ssphy_1 {
 514         status = "okay";
 515 };
 516
 517 &usb_0 {
 518         status = "okay";
 519 };
 520
 521 &usb_1 {
 522         status = "okay";
 523 };
 524
 525 &wifi{
 526         status = "okay";
 527
 528         qcom,ath11k-calibration-variant = "Netgear-RAX120v2";
 529 };
 530
 531 &cryptobam {
 532         status = "okay";
 533 };
 534
 535 &crypto {
 536         status = "okay";
 537 };
 538
 539 &prng {
 540         status = "okay";
 541 };