target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8074-ess.dtsi

   1 // SPDX-License-Identifier: GPL-2.0-only
   2
   3 &clocks {
   4         bias_pll_cc_clk {
   5                 compatible = "fixed-clock";
   6                 clock-frequency = <300000000>;
   7                 #clock-cells = <0>;
   8         };
   9
  10         bias_pll_nss_noc_clk {
  11                 compatible = "fixed-clock";
  12                 clock-frequency = <416500000>;
  13                 #clock-cells = <0>;
  14         };
  15 };
  16
  17 &soc {
  18         switch: ess-switch@3a000000 {
  19                 compatible = "qcom,ess-switch-ipq807x";
  20                 reg = <0x3a000000 0x1000000>;
  21                 switch_access_mode = "local bus";
  22                 switch_cpu_bmp = <0x1>;  /* cpu port bitmap */
  23                 switch_inner_bmp = <0x80>; /*inner port bitmap*/
  24                 clocks = <&gcc GCC_CMN_12GPLL_AHB_CLK>,
  25                          <&gcc GCC_CMN_12GPLL_SYS_CLK>,
  26                          <&gcc GCC_UNIPHY0_AHB_CLK>,
  27                          <&gcc GCC_UNIPHY0_SYS_CLK>,
  28                          <&gcc GCC_UNIPHY1_AHB_CLK>,
  29                          <&gcc GCC_UNIPHY1_SYS_CLK>,
  30                          <&gcc GCC_UNIPHY2_AHB_CLK>,
  31                          <&gcc GCC_UNIPHY2_SYS_CLK>,
  32                          <&gcc GCC_PORT1_MAC_CLK>,
  33                          <&gcc GCC_PORT2_MAC_CLK>,
  34                          <&gcc GCC_PORT3_MAC_CLK>,
  35                          <&gcc GCC_PORT4_MAC_CLK>,
  36                          <&gcc GCC_PORT5_MAC_CLK>,
  37                          <&gcc GCC_PORT6_MAC_CLK>,
  38                          <&gcc GCC_NSS_PPE_CLK>,
  39                          <&gcc GCC_NSS_PPE_CFG_CLK>,
  40                          <&gcc GCC_NSSNOC_PPE_CLK>,
  41                          <&gcc GCC_NSSNOC_PPE_CFG_CLK>,
  42                          <&gcc GCC_NSS_EDMA_CLK>,
  43                          <&gcc GCC_NSS_EDMA_CFG_CLK>,
  44                          <&gcc GCC_NSS_PPE_IPE_CLK>,
  45                          <&gcc GCC_NSS_PPE_BTQ_CLK>,
  46                          <&gcc GCC_MDIO_AHB_CLK>,
  47                          <&gcc GCC_NSS_NOC_CLK>,
  48                          <&gcc GCC_NSSNOC_SNOC_CLK>,
  49                          <&gcc GCC_MEM_NOC_NSS_AXI_CLK>,
  50                          <&gcc GCC_NSS_CRYPTO_CLK>,
  51                          <&gcc GCC_NSS_IMEM_CLK>,
  52                          <&gcc GCC_NSS_PTP_REF_CLK>,
  53                          <&gcc GCC_NSS_PORT1_RX_CLK>,
  54                          <&gcc GCC_NSS_PORT1_TX_CLK>,
  55                          <&gcc GCC_NSS_PORT2_RX_CLK>,
  56                          <&gcc GCC_NSS_PORT2_TX_CLK>,
  57                          <&gcc GCC_NSS_PORT3_RX_CLK>,
  58                          <&gcc GCC_NSS_PORT3_TX_CLK>,
  59                          <&gcc GCC_NSS_PORT4_RX_CLK>,
  60                          <&gcc GCC_NSS_PORT4_TX_CLK>,
  61                          <&gcc GCC_NSS_PORT5_RX_CLK>,
  62                          <&gcc GCC_NSS_PORT5_TX_CLK>,
  63                          <&gcc GCC_NSS_PORT6_RX_CLK>,
  64                          <&gcc GCC_NSS_PORT6_TX_CLK>,
  65                          <&gcc GCC_UNIPHY0_PORT1_RX_CLK>,
  66                          <&gcc GCC_UNIPHY0_PORT1_TX_CLK>,
  67                          <&gcc GCC_UNIPHY0_PORT2_RX_CLK>,
  68                          <&gcc GCC_UNIPHY0_PORT2_TX_CLK>,
  69                          <&gcc GCC_UNIPHY0_PORT3_RX_CLK>,
  70                          <&gcc GCC_UNIPHY0_PORT3_TX_CLK>,
  71                          <&gcc GCC_UNIPHY0_PORT4_RX_CLK>,
  72                          <&gcc GCC_UNIPHY0_PORT4_TX_CLK>,
  73                          <&gcc GCC_UNIPHY0_PORT5_RX_CLK>,
  74                          <&gcc GCC_UNIPHY0_PORT5_TX_CLK>,
  75                          <&gcc GCC_UNIPHY1_PORT5_RX_CLK>,
  76                          <&gcc GCC_UNIPHY1_PORT5_TX_CLK>,
  77                          <&gcc GCC_UNIPHY2_PORT6_RX_CLK>,
  78                          <&gcc GCC_UNIPHY2_PORT6_TX_CLK>,
  79                          <&gcc NSS_PORT5_RX_CLK_SRC>,
  80                          <&gcc NSS_PORT5_TX_CLK_SRC>;
  81                 clock-names = "cmn_ahb_clk", "cmn_sys_clk",
  82                               "uniphy0_ahb_clk", "uniphy0_sys_clk",
  83                               "uniphy1_ahb_clk", "uniphy1_sys_clk",
  84                               "uniphy2_ahb_clk", "uniphy2_sys_clk",
  85                               "port1_mac_clk", "port2_mac_clk",
  86                               "port3_mac_clk", "port4_mac_clk",
  87                               "port5_mac_clk", "port6_mac_clk",
  88                               "nss_ppe_clk", "nss_ppe_cfg_clk",
  89                               "nssnoc_ppe_clk", "nssnoc_ppe_cfg_clk",
  90                               "nss_edma_clk", "nss_edma_cfg_clk",
  91                               "nss_ppe_ipe_clk", "nss_ppe_btq_clk",
  92                               "gcc_mdio_ahb_clk", "gcc_nss_noc_clk",
  93                               "gcc_nssnoc_snoc_clk",
  94                               "gcc_mem_noc_nss_axi_clk",
  95                               "gcc_nss_crypto_clk",
  96                               "gcc_nss_imem_clk",
  97                               "gcc_nss_ptp_ref_clk",
  98                               "nss_port1_rx_clk", "nss_port1_tx_clk",
  99                               "nss_port2_rx_clk", "nss_port2_tx_clk",
 100                               "nss_port3_rx_clk", "nss_port3_tx_clk",
 101                               "nss_port4_rx_clk", "nss_port4_tx_clk",
 102                               "nss_port5_rx_clk", "nss_port5_tx_clk",
 103                               "nss_port6_rx_clk", "nss_port6_tx_clk",
 104                               "uniphy0_port1_rx_clk",
 105                               "uniphy0_port1_tx_clk",
 106                               "uniphy0_port2_rx_clk",
 107                               "uniphy0_port2_tx_clk",
 108                               "uniphy0_port3_rx_clk",
 109                               "uniphy0_port3_tx_clk",
 110                               "uniphy0_port4_rx_clk",
 111                               "uniphy0_port4_tx_clk",
 112                               "uniphy0_port5_rx_clk",
 113                               "uniphy0_port5_tx_clk",
 114                               "uniphy1_port5_rx_clk",
 115                               "uniphy1_port5_tx_clk",
 116                               "uniphy2_port6_rx_clk",
 117                               "uniphy2_port6_tx_clk",
 118                               "nss_port5_rx_clk_src",
 119                               "nss_port5_tx_clk_src";
 120                 resets = <&gcc GCC_PPE_FULL_RESET>,
 121                          <&gcc GCC_UNIPHY0_SOFT_RESET>,
 122                          <&gcc GCC_UNIPHY0_XPCS_RESET>,
 123                          <&gcc GCC_UNIPHY1_SOFT_RESET>,
 124                          <&gcc GCC_UNIPHY1_XPCS_RESET>,
 125                          <&gcc GCC_UNIPHY2_SOFT_RESET>,
 126                          <&gcc GCC_UNIPHY2_XPCS_RESET>,
 127                          <&gcc GCC_NSSPORT1_RESET>,
 128                          <&gcc GCC_NSSPORT2_RESET>,
 129                          <&gcc GCC_NSSPORT3_RESET>,
 130                          <&gcc GCC_NSSPORT4_RESET>,
 131                          <&gcc GCC_NSSPORT5_RESET>,
 132                          <&gcc GCC_NSSPORT6_RESET>;
 133                 reset-names = "ppe_rst", "uniphy0_soft_rst",
 134                               "uniphy0_xpcs_rst", "uniphy1_soft_rst",
 135                               "uniphy1_xpcs_rst", "uniphy2_soft_rst",
 136                               "uniphy2_xpcs_rst", "nss_port1_rst",
 137                               "nss_port2_rst", "nss_port3_rst",
 138                               "nss_port4_rst", "nss_port5_rst",
 139                               "nss_port6_rst";
 140                 mdio-bus = <&mdio>;
 141                 status = "disabled";
 142
 143                 port_scheduler_resource {
 144                         port@0 {
 145                                 port_id = <0>;
 146                                 ucast_queue = <0 143>;
 147                                 mcast_queue = <256 271>;
 148                                 l0sp = <0 35>;
 149                                 l0cdrr = <0 47>;
 150                                 l0edrr = <0 47>;
 151                                 l1cdrr = <0 7>;
 152                                 l1edrr = <0 7>;
 153                         };
 154                         port@1 {
 155                                 port_id = <1>;
 156                                 ucast_queue = <144 159>;
 157                                 mcast_queue = <272 275>;
 158                                 l0sp = <36 39>;
 159                                 l0cdrr = <48 63>;
 160                                 l0edrr = <48 63>;
 161                                 l1cdrr = <8 11>;
 162                                 l1edrr = <8 11>;
 163                         };
 164                         port@2 {
 165                                 port_id = <2>;
 166                                 ucast_queue = <160 175>;
 167                                 mcast_queue = <276 279>;
 168                                 l0sp = <40 43>;
 169                                 l0cdrr = <64 79>;
 170                                 l0edrr = <64 79>;
 171                                 l1cdrr = <12 15>;
 172                                 l1edrr = <12 15>;
 173                         };
 174                         port@3 {
 175                                 port_id = <3>;
 176                                 ucast_queue = <176 191>;
 177                                 mcast_queue = <280 283>;
 178                                 l0sp = <44 47>;
 179                                 l0cdrr = <80 95>;
 180                                 l0edrr = <80 95>;
 181                                 l1cdrr = <16 19>;
 182                                 l1edrr = <16 19>;
 183                         };
 184                         port@4 {
 185                                 port_id = <4>;
 186                                 ucast_queue = <192 207>;
 187                                 mcast_queue = <284 287>;
 188                                 l0sp = <48 51>;
 189                                 l0cdrr = <96 111>;
 190                                 l0edrr = <96 111>;
 191                                 l1cdrr = <20 23>;
 192                                 l1edrr = <20 23>;
 193                         };
 194                         port@5 {
 195                                 port_id = <5>;
 196                                 ucast_queue = <208 223>;
 197                                 mcast_queue = <288 291>;
 198                                 l0sp = <52 55>;
 199                                 l0cdrr = <112 127>;
 200                                 l0edrr = <112 127>;
 201                                 l1cdrr = <24 27>;
 202                                 l1edrr = <24 27>;
 203                         };
 204                         port@6 {
 205                                 port_id = <6>;
 206                                 ucast_queue = <224 239>;
 207                                 mcast_queue = <292 295>;
 208                                 l0sp = <56 59>;
 209                                 l0cdrr = <128 143>;
 210                                 l0edrr = <128 143>;
 211                                 l1cdrr = <28 31>;
 212                                 l1edrr = <28 31>;
 213                         };
 214                         port@7 {
 215                                 port_id = <7>;
 216                                 ucast_queue = <240 255>;
 217                                 mcast_queue = <296 299>;
 218                                 l0sp = <60 63>;
 219                                 l0cdrr = <144 159>;
 220                                 l0edrr = <144 159>;
 221                                 l1cdrr = <32 35>;
 222                                 l1edrr = <32 35>;
 223                         };
 224                 };
 225                 port_scheduler_config {
 226                         port@0 {
 227                                 port_id = <0>;
 228                                 l1scheduler {
 229                                         group@0 {
 230                                                 sp = <0 1>; /*L0 SPs*/
 231                                                 /*cpri cdrr epri edrr*/
 232                                                 cfg = <0 0 0 0>;
 233                                         };
 234                                 };
 235                                 l0scheduler {
 236                                         group@0 {
 237                                                 /*unicast queues*/
 238                                                 ucast_queue = <0 4 8>;
 239                                                 /*multicast queues*/
 240                                                 mcast_queue = <256 260>;
 241                                                 /*sp cpri cdrr epri edrr*/
 242                                                 cfg = <0 0 0 0 0>;
 243                                         };
 244                                         group@1 {
 245                                                 ucast_queue = <1 5 9>;
 246                                                 mcast_queue = <257 261>;
 247                                                 cfg = <0 1 1 1 1>;
 248                                         };
 249                                         group@2 {
 250                                                 ucast_queue = <2 6 10>;
 251                                                 mcast_queue = <258 262>;
 252                                                 cfg = <0 2 2 2 2>;
 253                                         };
 254                                         group@3 {
 255                                                 ucast_queue = <3 7 11>;
 256                                                 mcast_queue = <259 263>;
 257                                                 cfg = <0 3 3 3 3>;
 258                                         };
 259                                 };
 260                         };
 261                         port@1 {
 262                                 port_id = <1>;
 263                                 l1scheduler {
 264                                         group@0 {
 265                                                 sp = <36>;
 266                                                 cfg = <0 8 0 8>;
 267                                         };
 268                                         group@1 {
 269                                                 sp = <37>;
 270                                                 cfg = <1 9 1 9>;
 271                                         };
 272                                 };
 273                                 l0scheduler {
 274                                         group@0 {
 275                                                 ucast_queue = <144>;
 276                                                 ucast_loop_pri = <16>;
 277                                                 mcast_queue = <272>;
 278                                                 mcast_loop_pri = <4>;
 279                                                 cfg = <36 0 48 0 48>;
 280                                         };
 281                                 };
 282                         };
 283                         port@2 {
 284                                 port_id = <2>;
 285                                 l1scheduler {
 286                                         group@0 {
 287                                                 sp = <40>;
 288                                                 cfg = <0 12 0 12>;
 289                                         };
 290                                         group@1 {
 291                                                 sp = <41>;
 292                                                 cfg = <1 13 1 13>;
 293                                         };
 294                                 };
 295                                 l0scheduler {
 296                                         group@0 {
 297                                                 ucast_queue = <160>;
 298                                                 ucast_loop_pri = <16>;
 299                                                 mcast_queue = <276>;
 300                                                 mcast_loop_pri = <4>;
 301                                                 cfg = <40 0 64 0 64>;
 302                                         };
 303                                 };
 304                         };
 305                         port@3 {
 306                                 port_id = <3>;
 307                                 l1scheduler {
 308                                         group@0 {
 309                                                 sp = <44>;
 310                                                 cfg = <0 16 0 16>;
 311                                         };
 312                                         group@1 {
 313                                                 sp = <45>;
 314                                                 cfg = <1 17 1 17>;
 315                                         };
 316                                 };
 317                                 l0scheduler {
 318                                         group@0 {
 319                                                 ucast_queue = <176>;
 320                                                 ucast_loop_pri = <16>;
 321                                                 mcast_queue = <280>;
 322                                                 mcast_loop_pri = <4>;
 323                                                 cfg = <44 0 80 0 80>;
 324                                         };
 325                                 };
 326                         };
 327                         port@4 {
 328                                 port_id = <4>;
 329                                 l1scheduler {
 330                                         group@0 {
 331                                                 sp = <48>;
 332                                                 cfg = <0 20 0 20>;
 333                                         };
 334                                         group@1 {
 335                                                 sp = <49>;
 336                                                 cfg = <1 21 1 21>;
 337                                         };
 338                                 };
 339                                 l0scheduler {
 340                                         group@0 {
 341                                                 ucast_queue = <192>;
 342                                                 ucast_loop_pri = <16>;
 343                                                 mcast_queue = <284>;
 344                                                 mcast_loop_pri = <4>;
 345                                                 cfg = <48 0 96 0 96>;
 346                                         };
 347                                 };
 348                         };
 349                         port@5 {
 350                                 port_id = <5>;
 351                                 l1scheduler {
 352                                         group@0 {
 353                                                 sp = <52>;
 354                                                 cfg = <0 24 0 24>;
 355                                         };
 356                                         group@1 {
 357                                                 sp = <53>;
 358                                                 cfg = <1 25 1 25>;
 359                                         };
 360                                 };
 361                                 l0scheduler {
 362                                         group@0 {
 363                                                 ucast_queue = <208>;
 364                                                 ucast_loop_pri = <16>;
 365                                                 mcast_queue = <288>;
 366                                                 mcast_loop_pri = <4>;
 367                                                 cfg = <52 0 112 0 112>;
 368                                         };
 369                                 };
 370                         };
 371                         port@6 {
 372                                 port_id = <6>;
 373                                 l1scheduler {
 374                                         group@0 {
 375                                                 sp = <56>;
 376                                                 cfg = <0 28 0 28>;
 377                                         };
 378                                         group@1 {
 379                                                 sp = <57>;
 380                                                 cfg = <1 29 1 29>;
 381                                         };
 382                                 };
 383                                 l0scheduler {
 384                                         group@0 {
 385                                                 ucast_queue = <224>;
 386                                                 ucast_loop_pri = <16>;
 387                                                 mcast_queue = <292>;
 388                                                 mcast_loop_pri = <4>;
 389                                                 cfg = <56 0 128 0 128>;
 390                                         };
 391                                 };
 392                         };
 393                         port@7 {
 394                                 port_id = <7>;
 395                                 l1scheduler {
 396                                         group@0 {
 397                                                 sp = <60>;
 398                                                 cfg = <0 32 0 32>;
 399                                         };
 400                                         group@1 {
 401                                                 sp = <61>;
 402                                                 cfg = <1 33 1 33>;
 403                                         };
 404                                 };
 405                                 l0scheduler {
 406                                         group@0 {
 407                                                 ucast_queue = <240>;
 408                                                 ucast_loop_pri = <16>;
 409                                                 mcast_queue = <296>;
 410                                                 cfg = <60 0 144 0 144>;
 411                                         };
 412                                 };
 413                         };
 414                 };
 415         };
 416
 417         ess-uniphy@7a00000 {
 418                 compatible = "qcom,ess-uniphy";
 419                 reg = <0x7a00000 0x30000>;
 420                 uniphy_access_mode = "local bus";
 421         };
 422
 423         edma: edma@3ab00000 {
 424                 compatible = "qcom,edma";
 425                 reg = <0x3ab00000 0x76900>;
 426                 reg-names = "edma-reg-base";
 427                 qcom,txdesc-ring-start = <23>;
 428                 qcom,txdesc-rings = <1>;
 429                 qcom,txcmpl-ring-start = <7>;
 430                 qcom,txcmpl-rings = <1>;
 431                 qcom,rxfill-ring-start = <7>;
 432                 qcom,rxfill-rings = <1>;
 433                 qcom,rxdesc-ring-start = <15>;
 434                 qcom,rxdesc-rings = <1>;
 435                 interrupts = <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
 436                              <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>,
 437                              <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>,
 438                              <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>;
 439                 resets = <&gcc GCC_EDMA_HW_RESET>;
 440                 reset-names = "edma_rst";
 441                 status = "disabled";
 442         };
 443
 444         dp1: dp1 {
 445                 device_type = "network";
 446                 compatible = "qcom,nss-dp";
 447                 qcom,id = <1>;
 448                 reg = <0x3a001000 0x200>;
 449                 qcom,mactype = <0>;
 450                 local-mac-address = [000000000000];
 451                 phy-mode = "sgmii";
 452                 status = "disabled";
 453         };
 454
 455         dp2: dp2 {
 456                 device_type = "network";
 457                 compatible = "qcom,nss-dp";
 458                 qcom,id = <2>;
 459                 reg = <0x3a001200 0x200>;
 460                 qcom,mactype = <0>;
 461                 local-mac-address = [000000000000];
 462                 phy-mode = "sgmii";
 463                 status = "disabled";
 464         };
 465
 466         dp3: dp3 {
 467                 device_type = "network";
 468                 compatible = "qcom,nss-dp";
 469                 qcom,id = <3>;
 470                 reg = <0x3a001400 0x200>;
 471                 qcom,mactype = <0>;
 472                 local-mac-address = [000000000000];
 473                 phy-mode = "sgmii";
 474                 status = "disabled";
 475         };
 476
 477         dp4: dp4 {
 478                 device_type = "network";
 479                 compatible = "qcom,nss-dp";
 480                 qcom,id = <4>;
 481                 reg = <0x3a001600 0x200>;
 482                 qcom,mactype = <0>;
 483                 local-mac-address = [000000000000];
 484                 phy-mode = "sgmii";
 485                 status = "disabled";
 486         };
 487
 488         dp5: dp5 {
 489                 device_type = "network";
 490                 compatible = "qcom,nss-dp";
 491                 qcom,id = <5>;
 492                 reg = <0x3a001800 0x200>;
 493                 qcom,mactype = <0>;
 494                 local-mac-address = [000000000000];
 495                 phy-mode = "sgmii";
 496                 status = "disabled";
 497         };
 498
 499         dp6: dp6 {
 500                 device_type = "network";
 501                 compatible = "qcom,nss-dp";
 502                 qcom,id = <6>;
 503                 reg = <0x3a001a00 0x200>;
 504                 qcom,mactype = <0>;
 505                 local-mac-address = [000000000000];
 506                 phy-mode = "sgmii";
 507                 status = "disabled";
 508         };
 509
 510         dp5_syn: dp5-syn {
 511                 device_type = "network";
 512                 compatible = "qcom,nss-dp";
 513                 qcom,id = <5>;
 514                 reg = <0x3a003000 0x3fff>;
 515                 qcom,mactype = <1>;
 516                 local-mac-address = [000000000000];
 517                 phy-mode = "sgmii";
 518                 status = "disabled";
 519         };
 520
 521         dp6_syn: dp6-syn {
 522                 device_type = "network";
 523                 compatible = "qcom,nss-dp";
 524                 qcom,id = <6>;
 525                 reg = <0x3a007000 0x3fff>;
 526                 qcom,mactype = <1>;
 527                 local-mac-address = [000000000000];
 528                 phy-mode = "sgmii";
 529                 status = "disabled";
 530         };
 531 };