qualcommax: dts: add reset delay to qca8081 phy
[openwrt/staging/jow.git] / target / linux / qualcommax / files / arch / arm64 / boot / dts / qcom / ipq8072-ax880.dts
1 // SPDX-License-Identifier: MIT, GPL-2.0 or later
2 /* Copyright (c) 2023, Ruslan Isaev <legale.legale@gmail.com> */
3
4 /dts-v1/;
5
6 #include "ipq8074.dtsi"
7 #include "ipq8074-hk-cpu.dtsi"
8 #include "ipq8074-ess.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/leds/common.h>
12
13 / {
14 model = "Yuncore AX880";
15 compatible = "yuncore,ax880", "qcom,ipq8074", "qcom,ipq8074-hk09";
16
17 aliases {
18 serial0 = &blsp1_uart5;
19 serial1 = &blsp1_uart3;
20 led-boot = &led_system;
21 led-failsafe = &led_system;
22 led-running = &led_system;
23 led-upgrade = &led_system;
24 /* Aliases as required by u-boot to patch MAC addresses */
25 ethernet0 = &dp5_syn;
26 ethernet1 = &dp6_syn;
27 label-mac-device = &dp5_syn;
28 };
29
30 chosen {
31 stdout-path = "serial0:115200n8";
32 bootargs-append = " root=/dev/ubiblock0_1";
33 };
34
35 keys {
36 compatible = "gpio-keys";
37 pinctrl-0 = <&button_pins>;
38 pinctrl-names = "default";
39
40 reset {
41 label = "reset";
42 gpios = <&tlmm 57 GPIO_ACTIVE_LOW>;
43 linux,code = <KEY_RESTART>;
44 };
45 };
46
47 leds {
48 compatible = "gpio-leds";
49
50 led_system: system {
51 label = "system";
52 color = "red";
53 gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>;
54 };
55
56 wlan2g {
57 label = "wlan2g";
58 color = "green";
59 linux,default-trigger = "phy0tpt";
60 gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>;
61 };
62
63 wlan5g {
64 label = "wlan5g";
65 color = "blue";
66 linux,default-trigger = "phy1tpt";
67 gpios = <&tlmm 9 GPIO_ACTIVE_HIGH>;
68 };
69 };
70 };
71
72 &tlmm {
73 mdio_pins: mdio-pins {
74 mdc {
75 pins = "gpio68";
76 function = "mdc";
77 drive-strength = <8>;
78 bias-pull-up;
79 };
80
81 mdio {
82 pins = "gpio69";
83 function = "mdio";
84 drive-strength = <8>;
85 bias-pull-up;
86 };
87 };
88
89 button_pins: button_pins {
90 reset_button {
91 pins = "gpio57";
92 function = "gpio";
93 drive-strength = <8>;
94 bias-pull-up;
95 };
96 };
97 };
98
99 &blsp1_spi1 {
100 status = "okay";
101
102 flash@0 {
103 #address-cells = <1>;
104 #size-cells = <1>;
105 reg = <0>;
106 compatible = "jedec,spi-nor";
107 spi-max-frequency = <50000000>;
108
109 partitions {
110 compatible = "fixed-partitions";
111 #address-cells = <1>;
112 #size-cells = <1>;
113
114 partition@0 {
115 label = "0:sbl1";
116 reg = <0x0 0x50000>;
117 read-only;
118 };
119
120 partition@50000 {
121 label = "0:mibib";
122 reg = <0x50000 0x10000>;
123 read-only;
124 };
125
126 partition@60000 {
127 label = "0:bootconfig";
128 reg = <0x60000 0x20000>;
129 read-only;
130 };
131
132 partition@80000 {
133 label = "0:bootconfig1";
134 reg = <0x80000 0x20000>;
135 read-only;
136 };
137
138 partition@a0000 {
139 label = "0:qsee_1";
140 reg = <0xa0000 0x180000>;
141 read-only;
142 };
143
144 partition@220000 {
145 label = "0:qsee";
146 reg = <0x220000 0x180000>;
147 read-only;
148 };
149
150 partition@3a0000 {
151 label = "0:devcfg";
152 reg = <0x3a0000 0x10000>;
153 read-only;
154 };
155
156 partition@3b0000 {
157 label = "0:devcfg_1";
158 reg = <0x3b0000 0x10000>;
159 read-only;
160 };
161
162 partition@3c0000 {
163 label = "0:apdp";
164 reg = <0x3c0000 0x10000>;
165 read-only;
166 };
167
168 partition@3d0000 {
169 label = "0:apdp_1";
170 reg = <0x3d0000 0x10000>;
171 read-only;
172 };
173
174 partition@3e0000 {
175 label = "0:rpm_1";
176 reg = <0x3e0000 0x40000>;
177 read-only;
178 };
179
180 partition@420000 {
181 label = "0:rpm";
182 reg = <0x420000 0x40000>;
183 read-only;
184 };
185
186 partition@460000 {
187 label = "0:cdt_1";
188 reg = <0x460000 0x10000>;
189 read-only;
190 };
191
192 partition@470000 {
193 label = "0:cdt";
194 reg = <0x470000 0x10000>;
195 read-only;
196 };
197
198 partition@480000 {
199 label = "0:appsblenv";
200 reg = <0x480000 0x10000>;
201 };
202
203 partition@490000 {
204 label = "0:appsbl_1";
205 reg = <0x490000 0xa0000>;
206 read-only;
207 };
208
209 partition@550000 {
210 label = "0:appsbl";
211 reg = <0x530000 0xa0000>;
212 read-only;
213 };
214
215 partition@610000 {
216 label = "0:art";
217 reg = <0x5d0000 0x40000>;
218 read-only;
219 };
220
221 partition@650000 {
222 label = "0:ethphyfw";
223 reg = <0x610000 0x80000>;
224 read-only;
225 };
226
227 };
228 };
229 };
230
231 //serial interface
232 &blsp1_uart3 {
233 status = "okay";
234 };
235
236 &blsp1_uart5 {
237 status = "okay";
238 };
239
240 &crypto {
241 status = "okay";
242 };
243
244 &cryptobam {
245 status = "okay";
246 };
247
248 &prng {
249 status = "okay";
250 };
251
252 &qpic_bam {
253 status = "okay";
254 };
255
256 &qusb_phy_0 {
257 status = "okay";
258 };
259
260 &ssphy_0 {
261 status = "okay";
262 };
263
264 &usb_0 {
265 status = "okay";
266 };
267
268 &qpic_nand {
269 status = "okay";
270
271 nand@0 {
272 reg = <0>;
273 nand-ecc-strength = <4>;
274 nand-ecc-step-size = <512>;
275 nand-bus-width = <8>;
276
277 partitions {
278 compatible = "fixed-partitions";
279 #address-cells = <1>;
280 #size-cells = <1>;
281
282 partition@0 {
283 label = "rootfs_1";
284 reg = <0x0000000 0x3400000>;
285 };
286
287 partition@3400000 {
288 label = "0:wififw";
289 reg = <0x3400000 0x800000>;
290 read-only;
291 };
292
293 rootfs: partition@3c00000 {
294 label = "rootfs";
295 reg = <0x3c00000 0x3400000>;
296 };
297
298 partition@7000000 {
299 label = "0:wififw_1";
300 reg = <0x7000000 0x800000>;
301 read-only;
302 };
303 };
304 };
305 };
306
307 &mdio {
308 status = "okay";
309
310 pinctrl-0 = <&mdio_pins>;
311 pinctrl-names = "default";
312
313 qca8081_24: ethernet-phy@24 {
314 compatible = "ethernet-phy-id004d.d101";
315 reg = <24>;
316 reset-deassert-us = <10000>;
317 reset-gpios = <&tlmm 33 GPIO_ACTIVE_LOW>;
318
319 leds {
320 #address-cells = <1>;
321 #size-cells = <0>;
322
323 led@0 {
324 reg = <0>;
325 color = <LED_COLOR_ID_GREEN>;
326 function = LED_FUNCTION_WAN;
327 default-state = "keep";
328 };
329 };
330 };
331
332 qca8081_28: ethernet-phy@28 {
333 compatible = "ethernet-phy-id004d.d101";
334 reg = <28>;
335 reset-deassert-us = <10000>;
336 reset-gpios = <&tlmm 44 GPIO_ACTIVE_LOW>;
337
338 leds {
339 #address-cells = <1>;
340 #size-cells = <0>;
341
342 led@0 {
343 reg = <0>;
344 color = <LED_COLOR_ID_GREEN>;
345 function = LED_FUNCTION_LAN;
346 default-state = "keep";
347 };
348 };
349 };
350 };
351
352 &switch {
353 status = "okay";
354
355 switch_lan_bmp = <ESS_PORT6>; /* lan port bitmap */
356 switch_wan_bmp = <ESS_PORT5>; /* wan port bitmap */
357 switch_mac_mode1 = <MAC_MODE_SGMII_CHANNEL0>; /* mac mode for uniphy instance1*/
358 switch_mac_mode2 = <MAC_MODE_SGMII_CHANNEL0>; /* mac mode for uniphy instance2*/
359
360 qcom,port_phyinfo {
361 port@5 {
362 port_id = <5>;
363 phy_address = <24>;
364 port_mac_sel = "QGMAC_PORT";
365 };
366 port@6 {
367 port_id = <6>;
368 phy_address = <28>;
369 port_mac_sel = "QGMAC_PORT";
370 };
371 };
372 };
373
374 &edma {
375 status = "okay";
376 };
377
378 &dp5_syn {
379 status = "okay";
380 phy-handle = <&qca8081_24>;
381 label = "wan";
382 };
383
384 &dp6_syn {
385 status = "okay";
386 phy-handle = <&qca8081_28>;
387 label = "lan";
388 };
389
390 &wifi {
391 status = "okay";
392 qcom,ath11k-calibration-variant = "Yuncore-AX880";
393 };