target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6010-mango-dvk.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 /dts-v1/;
   4
   5 #include "ipq6018.dtsi"
   6 #include "ipq6018-cp-cpu.dtsi"
   7 #include "ipq6018-ess.dtsi"
   8 #include <dt-bindings/gpio/gpio.h>
   9 #include <dt-bindings/input/input.h>
  10 #include <dt-bindings/leds/common.h>
  11
  12 / {
  13         model = "8devices Mango-DVK";
  14         compatible = "8devices,mango-dvk", "qcom,ipq6018";
  15
  16         aliases {
  17                 serial0 = &blsp1_uart3;
  18         };
  19
  20         chosen {
  21                 stdout-path = "serial0:115200n8";
  22         };
  23
  24         keys {
  25                 compatible = "gpio-keys";
  26
  27                 wps {
  28                         label = "wps";
  29                         gpios = <&tlmm 79 GPIO_ACTIVE_LOW>;
  30                         linux,code = <KEY_WPS_BUTTON>;
  31                 };
  32         };
  33
  34         leds {
  35                 compatible = "gpio-leds";
  36                 pinctrl-0 = <&led_pins>;
  37                 pinctrl-names = "default";
  38
  39                 wlan5g {
  40                         color = <LED_COLOR_ID_GREEN>;
  41                         function = LED_FUNCTION_WLAN;
  42                         function-enumerator = <0>;
  43                         gpios = <&tlmm 66 GPIO_ACTIVE_HIGH>;
  44                         linux,default-trigger = "phy0radio";
  45                 };
  46
  47                 wlan2g {
  48                         color = <LED_COLOR_ID_GREEN>;
  49                         function = LED_FUNCTION_WLAN;
  50                         function-enumerator = <1>;
  51                         gpios = <&tlmm 67 GPIO_ACTIVE_HIGH>;
  52                         linux,default-trigger = "phy1radio";
  53                 };
  54         };
  55 };
  56
  57 &tlmm {
  58         mdio_pins: mdio-pins {
  59                 mdc {
  60                         pins = "gpio64";
  61                         function = "mdc";
  62                         drive-strength = <8>;
  63                         bias-pull-up;
  64                 };
  65
  66                 mdio {
  67                         pins = "gpio65";
  68                         function = "mdio";
  69                         drive-strength = <8>;
  70                         bias-pull-up;
  71                 };
  72         };
  73
  74         spi_0_pins: spi-0-pins {
  75                 pins = "gpio38", "gpio39", "gpio40", "gpio41";
  76                 function = "blsp0_spi";
  77                 drive-strength = <8>;
  78                 bias-pull-down;
  79         };
  80
  81         led_pins: led_pins {
  82                 leds {
  83                         pins = "gpio66", "gpio67";
  84                         function = "gpio";
  85                         drive-strength = <8>;
  86                         bias-pull-down;
  87                 };
  88         };
  89
  90         sd_pins: sd_pins {
  91                 sd_cd {
  92                          pins = "gpio62";
  93                          function = "gpio";
  94                          drive-strength = <8>;
  95                          bias-pull-up;
  96                 };
  97         };
  98 };
  99
 100 &blsp1_uart3 {
 101         pinctrl-0 = <&serial_3_pins>;
 102         pinctrl-names = "default";
 103         status = "okay";
 104 };
 105
 106 &blsp1_spi1 {
 107         pinctrl-0 = <&spi_0_pins>;
 108         pinctrl-names = "default";
 109         status = "okay";
 110
 111         flash@0 {
 112                 #address-cells = <1>;
 113                 #size-cells = <1>;
 114                 reg = <0>;
 115                 compatible = "jedec,spi-nor";
 116                 spi-max-frequency = <25000000>;
 117
 118                 partitions {
 119                         compatible = "fixed-partitions";
 120                         #address-cells = <1>;
 121                         #size-cells = <1>;
 122
 123                         partition@0 {
 124                                 label = "0:SBL1";
 125                                 reg = <0x00000000 0x000c0000>;
 126                         };
 127
 128                         partition@c0000 {
 129                                 label = "0:MIBIB";
 130                                 reg = <0x000c0000 0x00010000>;
 131                         };
 132
 133                         partition@d0000 {
 134                                 label = "0:QSEE";
 135                                 reg = <0x000d0000 0x001a0000>;
 136                         };
 137
 138                         partition@270000 {
 139                                 label = "0:DEVCFG";
 140                                 reg = <0x00270000 0x00010000>;
 141                         };
 142
 143                         partition@280000 {
 144                                 label = "0:RPM";
 145                                 reg = <0x00280000 0x00020000>;
 146                         };
 147
 148                         partition@2a0000 {
 149                                 label = "0:CDT";
 150                                 reg = <0x002a0000 0x00010000>;
 151                         };
 152
 153                         partition@2b0000 {
 154                                 label = "0:APPSBLENV";
 155                                 reg = <0x002b0000 0x00010000>;
 156                         };
 157
 158                         partition@2c0000 {
 159                                 label = "0:APPSBL";
 160                                 reg = <0x002c0000 0x000a0000>;
 161                         };
 162
 163                         partition@360000 {
 164                                 compatible = "nvmem-cells";
 165                                 #address-cells = <1>;
 166                                 #size-cells = <1>;
 167                                 label = "0:ART";
 168                                 reg = <0x00360000 0x00040000>;
 169
 170                                 macaddr_eth0: macaddr@0 {
 171                                         reg = <0x0 0x6>;
 172                                 };
 173
 174                                 macaddr_eth1: macaddr@6 {
 175                                         reg = <0x6 0x6>;
 176                                 };
 177
 178                                 macaddr_eth2: macaddr@c {
 179                                         reg = <0xc 0x6>;
 180                                 };
 181                         };
 182
 183                         partition@3a0000 {
 184                                 label = "config";
 185                                 reg = <0x003a0000 0x00040000>;
 186                         };
 187
 188                         partition@3e0000 {
 189                                 label = "data";
 190                                 reg = <0x003e0000 0x00100000>;
 191                         };
 192
 193                         partition@4e0000 {
 194                                 label = "firmware";
 195                                 compatible = "denx,fit";
 196                                 reg = <0x004e0000 0x1b20000>;
 197                         };
 198                 };
 199         };
 200 };
 201
 202 &dp3 {
 203         status = "okay";
 204
 205         phy-handle = <&qca8072_1>;
 206         nvmem-cells = <&macaddr_eth1>;
 207         nvmem-cell-names = "mac-address";
 208         label = "lan2";
 209 };
 210
 211 &dp4 {
 212         status = "okay";
 213
 214         phy-handle = <&qca8072_0>;
 215         nvmem-cells = <&macaddr_eth0>;
 216         nvmem-cell-names = "mac-address";
 217         label = "lan1";
 218 };
 219
 220 &dp5 {
 221         status = "okay";
 222
 223         phy-handle = <&qca8081>;
 224         nvmem-cells = <&macaddr_eth2>;
 225         nvmem-cell-names = "mac-address";
 226         label = "wan";
 227 };
 228
 229 &edma {
 230         status = "okay";
 231 };
 232
 233 &mdio {
 234         status = "okay";
 235         pinctrl-0 = <&mdio_pins>;
 236         pinctrl-names = "default";
 237         reset-gpios = <&tlmm 75 GPIO_ACTIVE_LOW>;
 238         reset-delay-us = <10000>;
 239         reset-post-delay-us = <50000>;
 240
 241         ethernet-phy-package@0 {
 242                 #address-cells = <1>;
 243                 #size-cells = <0>;
 244                 compatible = "qcom,qca8075-package";
 245                 reg = <0>;
 246
 247                 qcom,package-mode = "psgmii";
 248
 249                 qca8072_0: ethernet-phy@3 {
 250                         compatible = "ethernet-phy-ieee802.3-c22";
 251                         reg = <3>;
 252                 };
 253
 254                 qca8072_1: ethernet-phy@4 {
 255                         compatible = "ethernet-phy-ieee802.3-c22";
 256                         reg = <4>;
 257                 };
 258         };
 259
 260         qca8081: ethernet-phy@24 {
 261                 compatible = "ethernet-phy-id004d.d101";
 262                 reg = <24>;
 263                 reset-gpios = <&tlmm 77 GPIO_ACTIVE_LOW>;
 264                 reset-assert-us = <10000>;
 265                 reset-deassert-us = <50000>;
 266         };
 267 };
 268
 269 &sdhc_1 {
 270         pinctrl-0 = <&sd_pins>;
 271         pinctrl-names = "default";
 272         status = "okay";
 273
 274         vqmmc-supply = <&ipq6018_l2>;
 275         cd-gpios = <&tlmm 62 GPIO_ACTIVE_LOW>;
 276 };
 277
 278 &switch {
 279         status = "okay";
 280
 281         switch_lan_bmp = <(ESS_PORT3 | ESS_PORT4)>;
 282         switch_wan_bmp = <ESS_PORT5>;
 283         switch_mac_mode = <MAC_MODE_PSGMII>;
 284         switch_mac_mode1 = <MAC_MODE_SGMII_PLUS>;
 285         port3_pcs_channel = <4>;
 286
 287         qcom,port_phyinfo {
 288                 port@3 {
 289                         port_id = <3>;
 290                         phy_address = <4>;
 291                 };
 292                 port@4 {
 293                         port_id = <4>;
 294                         phy_address = <3>;
 295                 };
 296                 port@5 {
 297                         port_id = <5>;
 298                         phy_address = <24>;
 299                         port_mac_sel = "QGMAC_PORT";
 300                 };
 301         };
 302 };
 303
 304 &qpic_bam {
 305         status = "okay";
 306 };
 307
 308 &qpic_nand {
 309         status = "okay";
 310
 311         nand@0 {
 312                 reg = <0>;
 313
 314                 nand-ecc-strength = <4>;
 315                 nand-ecc-step-size = <512>;
 316                 nand-bus-width = <8>;
 317
 318                 partitions {
 319                         compatible = "fixed-partitions";
 320                         #address-cells = <1>;
 321                         #size-cells = <1>;
 322
 323                         partition@0 {
 324                                 label = "nand_data";
 325                                 reg = <0x0000000 0x10000000>;
 326                         };
 327                 };
 328         };
 329 };
 330
 331 &pcie_phy {
 332         status = "okay";
 333 };
 334
 335 &pcie0 {
 336         status = "okay";
 337         perst-gpio = <&tlmm 60 GPIO_ACTIVE_LOW>;
 338 };
 339
 340 &wifi {
 341         status = "okay";
 342         qcom,ath11k-calibration-variant = "8devices-Mango";
 343 };
 344
 345 &qusb_phy_1 {
 346         status = "okay";
 347 };
 348
 349 &usb2 {
 350         status = "okay";
 351 };
 352
 353 &qusb_phy_0 {
 354         status = "okay";
 355 };
 356
 357 &ssphy_0 {
 358         status = "okay";
 359 };
 360
 361 &usb3 {
 362         status = "okay";
 363 };