mvebu: add inital support for Marvell Armada XP/370 SoCs
[openwrt/staging/stintel.git] / target / linux / mvebu / patches-3.8 / 017-arm_cache_l2x0_aurora_use_writel_relaxed.patch
1 From 6c8928f877a1572f16cfc8a0c055d7e16320c741 Mon Sep 17 00:00:00 2001
2 From: Gregory CLEMENT <gregory.clement@free-electrons.com>
3 Date: Thu, 13 Dec 2012 18:33:06 +0100
4 Subject: [PATCH] arm: cache-l2x0: aurora: Use writel_relaxed instead of
5 writel
6
7 The use of writel instead of writel_relaxed lead to deadlock in some
8 situation (SMP on Armada 370 for instance). The use of writel_relaxed
9 as it was done in the rest of this driver fixes this bug.
10
11 Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
12 ---
13 arch/arm/mm/cache-l2x0.c | 9 +++++----
14 1 file changed, 5 insertions(+), 4 deletions(-)
15
16 diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
17 index 7ffe943..96a1ae4 100644
18 --- a/arch/arm/mm/cache-l2x0.c
19 +++ b/arch/arm/mm/cache-l2x0.c
20 @@ -459,8 +459,8 @@ static void aurora_pa_range(unsigned long start, unsigned long end,
21 unsigned long flags;
22
23 raw_spin_lock_irqsave(&l2x0_lock, flags);
24 - writel(start, l2x0_base + AURORA_RANGE_BASE_ADDR_REG);
25 - writel(end, l2x0_base + offset);
26 + writel_relaxed(start, l2x0_base + AURORA_RANGE_BASE_ADDR_REG);
27 + writel_relaxed(end, l2x0_base + offset);
28 raw_spin_unlock_irqrestore(&l2x0_lock, flags);
29
30 cache_sync();
31 @@ -674,8 +674,9 @@ static void pl310_resume(void)
32 static void aurora_resume(void)
33 {
34 if (!(readl(l2x0_base + L2X0_CTRL) & L2X0_CTRL_EN)) {
35 - writel(l2x0_saved_regs.aux_ctrl, l2x0_base + L2X0_AUX_CTRL);
36 - writel(l2x0_saved_regs.ctrl, l2x0_base + L2X0_CTRL);
37 + writel_relaxed(l2x0_saved_regs.aux_ctrl,
38 + l2x0_base + L2X0_AUX_CTRL);
39 + writel_relaxed(l2x0_saved_regs.ctrl, l2x0_base + L2X0_CTRL);
40 }
41 }
42
43 --
44 1.7.10.4
45