mpc85xx: add linux,stdout-path for WS-AP3825i
[openwrt/staging/dedeckeh.git] / target / linux / mpc85xx / files / arch / powerpc / boot / dts / ws-ap3825i.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later or MIT
2
3 /include/ "fsl/p1020si-pre.dtsi"
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7
8 / {
9 model = "Extreme Networks WS-AP3825i";
10 compatible = "extreme-networks,ws-ap3825i";
11
12 aliases {
13 ethernet0 = &enet0;
14 ethernet1 = &enet2;
15 led-boot = &led_power_green;
16 led-failsafe = &led_power_red;
17 led-running = &led_power_green;
18 led-upgrade = &led_power_red;
19 };
20
21 chosen {
22 bootargs-override = "console=ttyS0,115200";
23 linux,stdout-path = &serial0;
24 };
25
26 memory {
27 device_type = "memory";
28 };
29
30 leds {
31 compatible = "gpio-leds";
32
33 wifi1 {
34 gpios = <&spi_gpio 3 GPIO_ACTIVE_HIGH>;
35 label = "green:radio1";
36 linux,default-trigger = "phy0tpt";
37 };
38
39 wifi2 {
40 gpios = <&spi_gpio 2 GPIO_ACTIVE_HIGH>;
41 label = "green:radio2";
42 linux,default-trigger = "phy1tpt";
43 };
44
45 led_power_green: power_green {
46 gpios = <&spi_gpio 0 GPIO_ACTIVE_HIGH>;
47 label = "green:power";
48 };
49
50 led_power_red: power_red {
51 gpios = <&spi_gpio 1 GPIO_ACTIVE_HIGH>;
52 label = "red:power";
53 };
54
55 lan1_red {
56 gpios = <&spi_gpio 6 GPIO_ACTIVE_HIGH>;
57 label = "red:lan1";
58 };
59
60 lan1_green {
61 gpios = <&spi_gpio 4 GPIO_ACTIVE_HIGH>;
62 label = "green:lan1";
63 };
64
65 lan2_red {
66 gpios = <&spi_gpio 7 GPIO_ACTIVE_HIGH>;
67 label = "red:lan2";
68 };
69
70 lan2_green {
71 gpios = <&spi_gpio 5 GPIO_ACTIVE_HIGH>;
72 label = "green:lan2";
73 };
74 };
75
76 keys {
77 compatible = "gpio-keys";
78
79 reset {
80 label = "Reset button";
81 gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
82 linux,code = <KEY_RESTART>;
83 };
84 };
85
86 lbc: localbus@ffe05000 {
87 reg = <0 0xffe05000 0 0x1000>;
88 ranges = <0x0 0x0 0x0 0xec000000 0x4000000>;
89
90 nor@0 {
91 #address-cells = <1>;
92 #size-cells = <1>;
93 compatible = "cfi-flash";
94 reg = <0x0 0x0 0x4000000>;
95 bank-width = <2>;
96 device-width = <1>;
97
98 partitions {
99 compatible = "fixed-partitions";
100 #address-cells = <1>;
101 #size-cells = <1>;
102
103 partition@0 {
104 compatible = "denx,fit";
105 reg = <0x0 0x3d60000>;
106 label = "firmware";
107 };
108
109 partition@3d60000 {
110 reg = <0x3d60000 0x20000>;
111 label = "calib";
112 read-only;
113 };
114
115 partition@3d80000{
116 reg = <0x3d80000 0x80000>;
117 label = "u-boot";
118 read-only;
119 };
120
121 partition@3e00000{
122 reg = <0x3e00000 0x100000>;
123 label = "nvram";
124 read-only;
125 };
126
127 partition@3f00000 {
128 reg = <0x3f00000 0x20000>;
129 label = "cfg2";
130 };
131
132 partition@3f20000 {
133 reg = <0x3f20000 0x20000>;
134 label = "cfg1";
135 };
136 };
137 };
138 };
139
140 soc: soc@ffe00000 {
141 ranges = <0x0 0x0 0xffe00000 0x100000>;
142
143 gpio0: gpio-controller@fc00 {
144 };
145
146 mdio@24000 {
147 phy0: ethernet-phy@0 {
148 /* interrupts = <3 1 0 0>; */
149 reg = <0x5>;
150 reset-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
151 reset-assert-us = <10000>;
152 reset-deassert-us = <10000>;
153 };
154
155 phy2: ethernet-phy@2 {
156 /* interrupts = <1 1 0 0>; */
157 reg = <0x6>;
158 reset-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
159 reset-assert-us = <10000>;
160 reset-deassert-us = <10000>;
161 };
162 };
163
164 mdio@25000 {
165 status = "disabled";
166 };
167
168 mdio@26000 {
169 status = "disabled";
170 };
171
172 enet0: ethernet@b0000 {
173 status = "okay";
174 phy-handle = <&phy0>;
175 phy-connection-type = "rgmii-id";
176 };
177
178 enet1: ethernet@b1000 {
179 status = "disabled";
180 };
181
182 enet2: ethernet@b2000 {
183 status = "okay";
184 phy-handle = <&phy2>;
185 phy-connection-type = "rgmii-id";
186 };
187
188 usb@22000 {
189 phy_type = "ulpi";
190 dr_mode = "host";
191 };
192
193 usb@23000 {
194 status = "disabled";
195 };
196 };
197
198 pci0: pcie@ffe09000 {
199 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
200 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
201 reg = <0 0xffe09000 0 0x1000>;
202 pcie@0 {
203 ranges = <0x2000000 0x0 0xa0000000
204 0x2000000 0x0 0xa0000000
205 0x0 0x20000000
206
207 0x1000000 0x0 0x0
208 0x1000000 0x0 0x0
209 0x0 0x100000>;
210 };
211 };
212
213 pci1: pcie@ffe0a000 {
214 reg = <0 0xffe0a000 0 0x1000>;
215 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
216 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
217 pcie@0 {
218 ranges = <0x2000000 0x0 0x80000000
219 0x2000000 0x0 0x80000000
220 0x0 0x20000000
221
222 0x1000000 0x0 0x0
223 0x1000000 0x0 0x0
224 0x0 0x100000>;
225 };
226 };
227 };
228
229 &soc {
230 led_spi {
231 /*
232 * This is currently non-functioning because the spi-gpio
233 * driver refuses to register when presented with this node.
234 */
235 compatible = "spi-gpio";
236 #address-cells = <1>;
237 #size-cells = <0>;
238
239 sck-gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
240 mosi-gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
241 num-chipselects = <0>;
242
243 spi_gpio: led_gpio@0 {
244 compatible = "fairchild,74hc595";
245 reg = <0>;
246 gpio-controller;
247 #gpio-cells = <2>;
248 registers-number = <1>;
249 spi-max-frequency = <100000>;
250 };
251 };
252 };
253
254 /include/ "fsl/p1020si-post.dtsi"
255
256 / {
257 cpus {
258 PowerPC,P1010@0 {
259 bus-frequency = <399999996>;
260 timebase-frequency = <50000000>;
261 clock-frequency = <799999992>;
262 d-cache-block-size = <0x20>;
263 d-cache-size = <0x8000>;
264 d-cache-sets = <0x80>;
265 i-cache-block-size = <0x20>;
266 i-cache-size = <0x8000>;
267 i-cache-sets = <0x80>;
268 };
269
270 PowerPC,P1010@1 {
271 bus-frequency = <399999996>;
272 timebase-frequency = <50000000>;
273 clock-frequency = <799999992>;
274 d-cache-block-size = <0x20>;
275 d-cache-size = <0x8000>;
276 d-cache-sets = <0x80>;
277 i-cache-block-size = <0x20>;
278 i-cache-size = <0x8000>;
279 i-cache-sets = <0x80>;
280 };
281 };
282
283 memory {
284 reg = <0x0 0x0 0x0 0x10000000>;
285 };
286
287 soc@ffe00000 {
288 bus-frequency = <399999996>;
289
290 serial@4600 {
291 clock-frequency = <399999996>;
292 };
293
294 serial@4500 {
295 clock-frequency = <399999996>;
296 };
297
298 pic@40000 {
299 clock-frequency = <399999996>;
300 };
301 };
302 };
303
304 /*
305 * For the OpenWrt 22.03 release, since Linux 5.10.138 now uses
306 * aliases to determine PCI domain numbers, drop aliases so as not to
307 * change the sysfs path of our wireless netdevs.
308 */
309
310 / {
311 aliases {
312 /delete-property/ pci0;
313 /delete-property/ pci1;
314 };
315 };