target/linux/mpc85xx/files/arch/powerpc/boot/dts/ws-ap3825i.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later or MIT
   2
   3 /include/ "fsl/p1020si-pre.dtsi"
   4
   5 #include <dt-bindings/gpio/gpio.h>
   6 #include <dt-bindings/input/input.h>
   7
   8 / {
   9         model = "Extreme Networks WS-AP3825i";
  10         compatible = "extreme-networks,ws-ap3825i";
  11
  12         #address-cells = <2>;
  13         #size-cells = <2>;
  14
  15         aliases {
  16                 ethernet0 = &enet0;
  17                 ethernet1 = &enet2;
  18                 led-boot = &led_power_green;
  19                 led-failsafe = &led_power_red;
  20                 led-running = &led_power_green;
  21                 led-upgrade = &led_power_red;
  22         };
  23
  24         chosen {
  25                 bootargs-override = "console=ttyS0,115200";
  26                 stdout-path = &serial0;
  27         };
  28
  29         memory {
  30                 device_type = "memory";
  31         };
  32
  33         leds {
  34                 compatible = "gpio-leds";
  35
  36                 wifi1 {
  37                         gpios = <&spi_gpio 3 GPIO_ACTIVE_HIGH>;
  38                         label = "green:radio1";
  39                         linux,default-trigger = "phy0tpt";
  40                 };
  41
  42                 wifi2 {
  43                         gpios = <&spi_gpio 2 GPIO_ACTIVE_HIGH>;
  44                         label = "green:radio2";
  45                         linux,default-trigger = "phy1tpt";
  46                 };
  47
  48                 led_power_green: power_green {
  49                         gpios = <&spi_gpio 0 GPIO_ACTIVE_HIGH>;
  50                         label = "green:power";
  51                 };
  52
  53                 led_power_red: power_red {
  54                         gpios = <&spi_gpio 1 GPIO_ACTIVE_HIGH>;
  55                         label = "red:power";
  56                 };
  57
  58                 lan1_red {
  59                         gpios = <&spi_gpio 6 GPIO_ACTIVE_HIGH>;
  60                         label = "red:lan1";
  61                 };
  62
  63                 lan1_green {
  64                         gpios = <&spi_gpio 4 GPIO_ACTIVE_HIGH>;
  65                         label = "green:lan1";
  66                 };
  67
  68                 lan2_red {
  69                         gpios = <&spi_gpio 7 GPIO_ACTIVE_HIGH>;
  70                         label = "red:lan2";
  71                 };
  72
  73                 lan2_green {
  74                         gpios = <&spi_gpio 5 GPIO_ACTIVE_HIGH>;
  75                         label = "green:lan2";
  76                 };
  77         };
  78
  79         keys {
  80                 compatible = "gpio-keys";
  81
  82                 reset {
  83                         label = "Reset button";
  84                         gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
  85                         linux,code = <KEY_RESTART>;
  86                 };
  87         };
  88
  89         lbc: localbus@ffe05000 {
  90                 reg = <0 0xffe05000 0 0x1000>;
  91                 ranges = <0x0 0x0 0x0 0xec000000 0x4000000>;
  92
  93                 nor@0 {
  94                         #address-cells = <1>;
  95                         #size-cells = <1>;
  96                         compatible = "cfi-flash";
  97                         reg = <0x0 0x0 0x4000000>;
  98                         bank-width = <2>;
  99                         device-width = <1>;
 100
 101                         partitions {
 102                                 compatible = "fixed-partitions";
 103                                 #address-cells = <1>;
 104                                 #size-cells = <1>;
 105
 106                                 partition@0 {
 107                                         compatible = "denx,fit";
 108                                         reg = <0x0 0x3d60000>;
 109                                         label = "firmware";
 110                                 };
 111
 112                                 partition@3d60000 {
 113                                         reg = <0x3d60000 0x20000>;
 114                                         label = "calib";
 115                                         read-only;
 116                                 };
 117
 118                                 partition@3d80000{
 119                                         reg = <0x3d80000 0x80000>;
 120                                         label = "u-boot";
 121                                         read-only;
 122                                 };
 123
 124                                 partition@3e00000{
 125                                         reg = <0x3e00000 0x100000>;
 126                                         label = "nvram";
 127                                         read-only;
 128                                 };
 129
 130                                 partition@3f00000 {
 131                                         reg = <0x3f00000 0x20000>;
 132                                         label = "cfg2";
 133                                 };
 134
 135                                 partition@3f20000 {
 136                                         reg = <0x3f20000 0x20000>;
 137                                         label = "cfg1";
 138                                 };
 139                         };
 140                 };
 141         };
 142
 143         soc: soc@ffe00000 {
 144                 ranges = <0x0 0x0 0xffe00000 0x100000>;
 145
 146                 gpio0: gpio-controller@fc00 {
 147                 };
 148
 149                 mdio@24000 {
 150                         phy0: ethernet-phy@0 {
 151                                 /* interrupts = <3 1 0 0>; */
 152                                 reg = <0x5>;
 153                                 reset-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
 154                                 reset-assert-us = <10000>;
 155                                 reset-deassert-us = <10000>;
 156                         };
 157
 158                         phy2: ethernet-phy@2 {
 159                                 /* interrupts = <1 1 0 0>; */
 160                                 reg = <0x6>;
 161                                 reset-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
 162                                 reset-assert-us = <10000>;
 163                                 reset-deassert-us = <10000>;
 164                         };
 165                 };
 166
 167                 mdio@25000 {
 168                         status = "disabled";
 169                 };
 170
 171                 mdio@26000 {
 172                         status = "disabled";
 173                 };
 174
 175                 enet0: ethernet@b0000 {
 176                         status = "okay";
 177                         phy-handle = <&phy0>;
 178                         phy-connection-type = "rgmii-id";
 179                 };
 180
 181                 enet1: ethernet@b1000 {
 182                         status = "disabled";
 183                 };
 184
 185                 enet2: ethernet@b2000 {
 186                         status = "okay";
 187                         phy-handle = <&phy2>;
 188                         phy-connection-type = "rgmii-id";
 189                 };
 190
 191                 usb@22000 {
 192                         phy_type = "ulpi";
 193                         dr_mode = "host";
 194                 };
 195
 196                 usb@23000 {
 197                         status = "disabled";
 198                 };
 199         };
 200
 201         pci0: pcie@ffe09000 {
 202                 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
 203                           0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
 204                 reg = <0 0xffe09000 0 0x1000>;
 205
 206                 /* Filled by U-Boot */
 207                 bus-range = <0x00 0x01>;
 208                 dma-ranges = <0x2000000 0x00 0xfff00000 0x00 0xffe00000
 209                               0x00 0x100000 0x42000000 0x00 0x00 0x00
 210                               0x00 0x00 0x10000000>;
 211
 212                 pcie@0 {
 213                         ranges = <0x2000000 0x0 0xa0000000
 214                                   0x2000000 0x0 0xa0000000
 215                                   0x0 0x20000000
 216
 217                                   0x1000000 0x0 0x0
 218                                   0x1000000 0x0 0x0
 219                                   0x0 0x100000>;
 220                 };
 221         };
 222
 223         pci1: pcie@ffe0a000 {
 224                 reg = <0 0xffe0a000 0 0x1000>;
 225                 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
 226                           0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
 227
 228                 /* Filled by U-Boot */
 229                 bus-range = <0x00 0x01>;
 230                 dma-ranges = <0x2000000 0x00 0xfff00000 0x00
 231                               0xffe00000 0x00 0x100000 0x42000000
 232                               0x00 0x00 0x00 0x00 0x00 0x10000000>;
 233
 234                 pcie@0 {
 235                         ranges = <0x2000000 0x0 0x80000000
 236                                   0x2000000 0x0 0x80000000
 237                                   0x0 0x20000000
 238
 239                                   0x1000000 0x0 0x0
 240                                   0x1000000 0x0 0x0
 241                                   0x0 0x100000>;
 242                 };
 243         };
 244 };
 245
 246 &soc {
 247         led_spi {
 248                 /*
 249                  * This is currently non-functioning because the spi-gpio
 250                  * driver refuses to register when presented with this node.
 251                  */
 252                 compatible = "spi-gpio";
 253                 #address-cells = <1>;
 254                 #size-cells = <0>;
 255
 256                 sck-gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
 257                 mosi-gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
 258                 num-chipselects = <0>;
 259
 260                 spi_gpio: led_gpio@0 {
 261                         compatible = "fairchild,74hc595";
 262                         reg = <0>;
 263                         gpio-controller;
 264                         #gpio-cells = <2>;
 265                         registers-number = <1>;
 266                         spi-max-frequency = <100000>;
 267                 };
 268         };
 269 };
 270
 271 /include/ "fsl/p1020si-post.dtsi"
 272
 273 / {
 274         cpus {
 275                 PowerPC,P1020@0 {
 276                         bus-frequency = <399999996>;
 277                         timebase-frequency = <50000000>;
 278                         clock-frequency = <799999992>;
 279                         d-cache-block-size = <0x20>;
 280                         d-cache-size = <0x8000>;
 281                         d-cache-sets = <0x80>;
 282                         i-cache-block-size = <0x20>;
 283                         i-cache-size = <0x8000>;
 284                         i-cache-sets = <0x80>;
 285                         cpu-release-addr = <0x0 0x0ffff280>;
 286                         status = "okay";
 287                         enable-method = "spin-table";
 288                 };
 289
 290                 PowerPC,P1020@1 {
 291                         bus-frequency = <399999996>;
 292                         timebase-frequency = <50000000>;
 293                         clock-frequency = <799999992>;
 294                         d-cache-block-size = <0x20>;
 295                         d-cache-size = <0x8000>;
 296                         d-cache-sets = <0x80>;
 297                         i-cache-block-size = <0x20>;
 298                         i-cache-size = <0x8000>;
 299                         i-cache-sets = <0x80>;
 300                         cpu-release-addr = <0x0 0x0ffff2a0>;
 301                         status = "disabled";
 302                         enable-method = "spin-table";
 303                 };
 304         };
 305
 306         memory {
 307                 reg = <0x0 0x0 0x0 0x10000000>;
 308         };
 309
 310         reserved-memory {
 311                 #address-cells = <2>;
 312                 #size-cells = <2>;
 313                 ranges;
 314
 315                 cpu1-bootpage@e000000 {
 316                         /* Reserve upper 1 MB for second-core-bootpage */
 317                         reg = <0x0 0xff00000 0x0 0x100000>;
 318                 };
 319         };
 320
 321         soc@ffe00000 {
 322                 bus-frequency = <399999996>;
 323
 324                 serial@4600 {
 325                         clock-frequency = <399999996>;
 326                 };
 327
 328                 serial@4500 {
 329                         clock-frequency = <399999996>;
 330                 };
 331
 332                 pic@40000 {
 333                         clock-frequency = <399999996>;
 334                 };
 335         };
 336
 337         localbus@ffe05000 {
 338                 bus-frequency = <24999999>;
 339         };
 340 };
 341
 342 &enet0 {
 343         rx-stash-idx = <0x00>;
 344         rx-stash-len = <0x60>;
 345         bd-stash;
 346 };
 347
 348 &enet2 {
 349         rx-stash-idx = <0x00>;
 350         rx-stash-len = <0x60>;
 351         bd-stash;
 352 };
 353
 354 /*
 355  * For the OpenWrt 22.03 release, since Linux 5.10.138 now uses
 356  * aliases to determine PCI domain numbers, drop aliases so as not to
 357  * change the sysfs path of our wireless netdevs.
 358  */
 359
 360 / {
 361         aliases {
 362                 /delete-property/ pci0;
 363                 /delete-property/ pci1;
 364         };
 365 };