target/linux/mpc85xx/files/arch/powerpc/boot/dts/ws-ap3715i.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later or MIT
   2
   3 #include <dt-bindings/gpio/gpio.h>
   4
   5 /include/ "fsl/p1010si-pre.dtsi"
   6
   7 / {
   8         model = "Enterasys WS-AP3715i";
   9         compatible = "enterasys,ws-ap3715i";
  10
  11         aliases {
  12                 led-boot = &led_power_green;
  13                 led-failsafe = &led_power_red;
  14                 led-running = &led_power_green;
  15                 led-upgrade = &led_power_red;
  16         };
  17
  18         chosen {
  19                 bootargs = "console=ttyS0,115200";
  20         };
  21
  22         memory {
  23                 device_type = "memory";
  24                 reg = <0x0 0x0 0x0 0x10000000>;
  25         };
  26
  27         leds {
  28                 compatible = "gpio-leds";
  29
  30                 wifi1 {
  31                         gpios = <&spi_gpio 3 GPIO_ACTIVE_HIGH>;
  32                         label = "green:radio1";
  33                         linux,default-trigger = "phy1tpt";
  34                 };
  35
  36                 wifi2 {
  37                         gpios = <&spi_gpio 2 GPIO_ACTIVE_HIGH>;
  38                         label = "green:radio2";
  39                         linux,default-trigger = "phy0tpt";
  40                 };
  41
  42                 led_power_green: power_green {
  43                         gpios = <&spi_gpio 0 GPIO_ACTIVE_HIGH>;
  44                         label = "green:power";
  45                 };
  46
  47                 led_power_red: power_red {
  48                         gpios = <&spi_gpio 1 GPIO_ACTIVE_HIGH>;
  49                         label = "red:power";
  50                 };
  51
  52                 lan1_red {
  53                         gpios = <&spi_gpio 6 GPIO_ACTIVE_HIGH>;
  54                         label = "red:lan1";
  55                 };
  56
  57                 lan1_green {
  58                         gpios = <&spi_gpio 4 GPIO_ACTIVE_HIGH>;
  59                         label = "green:lan1";
  60                 };
  61
  62                 lan2_red {
  63                         gpios = <&spi_gpio 7 GPIO_ACTIVE_HIGH>;
  64                         label = "red:lan2";
  65                 };
  66
  67                 lan2_green {
  68                         gpios = <&spi_gpio 5 GPIO_ACTIVE_HIGH>;
  69                         label = "green:lan2";
  70                 };
  71         };
  72
  73         soc: soc@ffe00000 {
  74                 ranges = <0x0 0x0 0xffe00000 0x100000>;
  75
  76                 gpio0: gpio-controller@fc00 {
  77                 };
  78
  79                 usb@22000 {
  80                         status = "disabled";
  81                 };
  82
  83                 mdio@24000 {
  84                         phy0: ethernet-phy@0 {
  85                                 reg = <0x1>;
  86                         };
  87
  88                         phy2: ethernet-phy@2 {
  89                                 reg = <0x2>;
  90                         };
  91                 };
  92
  93                 mdio@25000 {
  94                         tbi_phy: tbi-phy@11 {
  95                                 reg = <0x11>;
  96                         };
  97                 };
  98
  99                 mdio@26000 {
 100                         status = "disabled";
 101                 };
 102
 103                 enet0: ethernet@b0000 {
 104                         phy-handle = <&phy0>;
 105                         phy-connection-type = "rgmii-id";
 106
 107                         label = "lan1";
 108                 };
 109
 110                 enet1: ethernet@b1000 {
 111                         phy-handle = <&phy2>;
 112                         phy-connection-type = "sgmii";
 113
 114                         tbi-handle = <&tbi_phy>;
 115
 116                         label = "lan2";
 117                 };
 118
 119                 enet2: ethernet@b2000 {
 120                         status = "disabled";
 121                 };
 122
 123                 sdhc@2e000 {
 124                         status = "disabled";
 125                 };
 126         };
 127
 128         ifc: ifc@ffe1e000 {
 129         };
 130
 131         pci0: pcie@ffe09000 {
 132                 reg = <0 0xffe09000 0 0x1000>;
 133                 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
 134                           0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
 135                 pcie@0 {
 136                         ranges = <0x2000000 0x0 0xa0000000
 137                                   0x2000000 0x0 0xa0000000
 138                                   0x0 0x20000000
 139
 140                                   0x1000000 0x0 0x0
 141                                   0x1000000 0x0 0x0
 142                                   0x0 0x100000>;
 143
 144                         wifi@0,0,0 {
 145                                 compatible = "pci168c,0033";
 146                                 reg = <0x0 0 0 0 0>;
 147                                 ieee80211-freq-limit = <2400000 2500000>;
 148                         };
 149                 };
 150         };
 151
 152         pci1: pcie@ffe0a000 {
 153                 reg = <0 0xffe0a000 0 0x1000>;
 154                 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
 155                           0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
 156                 pcie@0 {
 157                         ranges = <0x2000000 0x0 0x80000000
 158                                   0x2000000 0x0 0x80000000
 159                                   0x0 0x20000000
 160
 161                                   0x1000000 0x0 0x0
 162                                   0x1000000 0x0 0x0
 163                                   0x0 0x100000>;
 164
 165                         wifi@0,0,0 {
 166                                 compatible = "pci168c,0033";
 167                                 reg = <0x0 0 0 0 0>;
 168                                 ieee80211-freq-limit = <5000000 6000000>;
 169                         };
 170                 };
 171         };
 172 };
 173
 174 &soc {
 175         led_spi {
 176                 compatible = "spi-gpio";
 177                 #address-cells = <1>;
 178                 #size-cells = <0>;
 179
 180                 sck-gpios = <&gpio0 10 GPIO_ACTIVE_HIGH>;
 181                 mosi-gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>;
 182                 num-chipselects = <0>;
 183
 184                 spi_gpio: led_gpio@0 {
 185                         compatible = "fairchild,74hc595";
 186                         reg = <0>;
 187                         gpio-controller;
 188                         #gpio-cells = <2>;
 189                         registers-number = <1>;
 190                         spi-max-frequency = <100000>;
 191                 };
 192         };
 193
 194         spi0: spi@7000 {
 195                 flash@0 {
 196                         compatible = "jedec,spi-nor";
 197                         reg = <0>;
 198                         spi-max-frequency = <25000000>;
 199
 200                         partitions {
 201                                 compatible = "fixed-partitions";
 202                                 #address-cells = <1>;
 203                                 #size-cells = <1>;
 204
 205                                 partition@0 {
 206                                         reg = <0x0 0xa0000>;
 207                                         label = "boot-bak";
 208                                         read-only;
 209                                 };
 210
 211                                 partition@a0000 {
 212                                         reg = <0xa0000 0xa0000>;
 213                                         label = "boot-pri";
 214                                         read-only;
 215                                 };
 216
 217                                 partition@120000 {
 218                                         reg = <0x120000 0x10000>;
 219                                         label = "cfg1";
 220                                         read-only;
 221                                 };
 222
 223                                 partition@130000 {
 224                                         reg = <0x130000 0x10000>;
 225                                         label = "cfg2";
 226                                         read-only;
 227                                 };
 228
 229                                 partition@140000 {
 230                                         compatible = "denx,uimage";
 231                                         reg = <0x140000 0x1d80000>;
 232                                         label = "firmware";
 233                                 };
 234
 235                                 partition@1ec0000 {
 236                                         reg = <0x1ec0000 0x100000>;
 237                                         label = "nvram";
 238                                         read-only;
 239                                 };
 240                         };
 241                 };
 242         };
 243 };
 244
 245 /include/ "fsl/p1010si-post.dtsi"
 246
 247 / {
 248         cpus {
 249                 PowerPC,P1010@0 {
 250                         bus-frequency = <399999996>;
 251                         timebase-frequency = <50000000>;
 252                         clock-frequency = <799999992>;
 253                         d-cache-block-size = <0x20>;
 254                         d-cache-size = <0x8000>;
 255                         d-cache-sets = <0x80>;
 256                         i-cache-block-size = <0x20>;
 257                         i-cache-size = <0x8000>;
 258                         i-cache-sets = <0x80>;
 259                 };
 260         };
 261
 262         soc@ffe00000 {
 263                 bus-frequency = <399999996>;
 264
 265                 serial@4600 {
 266                         clock-frequency = <399999996>;
 267                         status = "disabled";
 268                 };
 269
 270                 serial@4500 {
 271                         clock-frequency = <399999996>;
 272                 };
 273
 274                 pic@40000 {
 275                         clock-frequency = <399999996>;
 276                 };
 277         };
 278 };
 279
 280 /*
 281  * For the OpenWrt 22.03 release, since Linux 5.10.138 now uses
 282  * aliases to determine PCI domain numbers, drop aliases so as not to
 283  * change the sysfs path of our wireless netdevs.
 284  */
 285
 286 / {
 287         aliases {
 288                 /delete-property/ pci0;
 289                 /delete-property/ pci1;
 290         };
 291 };
 292