2 * TP-Link TL-WDR4900 v1 Device Tree Source
4 * Copyright 2013 Gabor Juhos <juhosg@openwrt.org>
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
12 /include/ "fsl/p1010si-pre.dtsi"
15 model = "TP-Link TL-WDR4900 v1";
16 compatible = "tplink,tl-wdr4900-v1";
19 bootargs = "console=ttyS0,115200";
21 stdout-path = "/soc@ffe00000/serial@4500";
27 led-boot = &system_green;
28 led-failsafe = &system_green;
29 led-running = &system_green;
30 led-upgrade = &system_green;
31 label-mac-device = &enet0;
35 device_type = "memory";
39 ranges = <0x0 0x0 0xffe00000 0x100000>;
43 compatible = "jedec,spi-nor";
45 spi-max-frequency = <25000000>;
48 compatible = "fixed-partitions";
53 reg = <0x0 0x0050000>;
59 reg = <0x00050000 0x00010000>;
65 compatible = "tplink,firmware";
66 reg = <0x00060000 0x00f80000>;
71 reg = <0x00fe0000 0x00010000>;
77 reg = <0x00ff0000 0x00010000>;
85 gpio0: gpio-controller@fc00 {
94 phy0: ethernet-phy@0 {
96 qca,ar8327-initvals = <
97 0x00004 0x07600000 /* PAD0_MODE */
98 0x00008 0x00000000 /* PAD5_MODE */
99 0x0000c 0x01000000 /* PAD6_MODE */
100 0x00010 0x40000000 /* POWER_ON_STRAP */
101 0x00050 0xcf35cf35 /* LED_CTRL0 */
102 0x00054 0xcf35cf35 /* LED_CTRL1 */
103 0x00058 0xcf35cf35 /* LED_CTRL2 */
104 0x0005c 0x03ffff00 /* LED_CTRL3 */
105 0x0007c 0x0000007e /* PORT0_STATUS */
106 0x00094 0x00000200 /* PORT6_STATUS */
119 enet0: ethernet@b0000 {
120 phy-handle = <&phy0>;
121 phy-connection-type = "rgmii-id";
122 nvmem-cells = <&macaddr_uboot_4fc00>;
123 nvmem-cell-names = "mac-address";
126 enet1: ethernet@b1000 {
130 enet2: ethernet@b2000 {
138 serial1: serial@4600 {
151 compatible = "fsl,etsec-ptp";
152 reg = <0xb0e00 0xb0>;
153 interrupts = <68 2 0 0 69 2 0 0 70 2 0 0>;
155 fsl,tclk-period = <5>;
157 fsl,tmr-add = <0xcccccccd>;
158 fsl,tmr-fiper1 = <0x3b9ac9fb>; /* 1PPS */
159 fsl,tmr-fiper2 = <0x00018696>;
160 fsl,max-adj = <249999999>;
164 pci0: pcie@ffe09000 {
165 reg = <0 0xffe09000 0 0x1000>;
166 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
167 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
169 ranges = <0x2000000 0x0 0xa0000000
170 0x2000000 0x0 0xa0000000
179 pci1: pcie@ffe0a000 {
180 reg = <0 0xffe0a000 0 0x1000>;
181 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
182 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
184 ranges = <0x2000000 0x0 0x80000000
185 0x2000000 0x0 0x80000000
199 compatible = "gpio-leds";
201 system_green: system {
202 gpios = <&gpio0 2 1>; /* active low */
203 label = "tp-link:blue:system";
207 gpios = <&gpio0 3 1>; /* active low */
208 label = "tp-link:green:usb1";
212 gpios = <&gpio0 4 1>; /* active low */
213 label = "tp-link:green:usb2";
217 gpios = <&gpio0 10 1>; /* active low */
218 label = "tp-link:usb:power";
223 compatible = "gpio-keys";
226 label = "Reset button";
227 gpios = <&gpio0 5 1>; /* active low */
228 linux,code = <0x198>; /* KEY_RESTART */
232 label = "RFKILL switch";
233 gpios = <&gpio0 11 1>; /* active low */
234 linux,code = <0xf7>; /* RFKill */
239 /include/ "fsl/p1010si-post.dtsi"
244 bus-frequency = <399999996>;
245 timebase-frequency = <49999999>;
246 clock-frequency = <799999992>;
251 reg = <0x0 0x0 0x0 0x8000000>;
255 bus-frequency = <399999996>;
258 clock-frequency = <399999996>;
262 clock-frequency = <399999996>;
266 clock-frequency = <399999996>;
272 * The TL-WDR4900 v1 uses the NXP (Freescale) P1014 SoC which is closely
273 * related to the P1010.
275 * NXP QP1010FS.pdf "QorIQ P1010 and P1014 Communications Processors"
276 * datasheet states that the P1014 does not include the accelerated crypto
277 * module (CAAM/SEC4) which is present in the P1010.
279 * NXP Appliation Note AN4938 Rev. 2 implies that some P1014 may contain the
280 * SEC4 module, but states that SoCs with System Version Register values
281 * 0x80F10110 or 0x80F10120 do not have the security feature.
283 * All v1.3 TL-WDR4900 tested have SVR == 0x80F10110 which AN4938 describes
284 * as: core rev 1.0, "P1014 (without security)".
286 * The SVR value is reported by uboot on the serial console.
291 /delete-node/ crypto@30000; /* Pulled in by p1010si-post */
296 compatible = "nvmem-cells";
297 #address-cells = <1>;
300 macaddr_uboot_4fc00: macaddr@4fc00 {