target/linux/mpc85xx/files/arch/powerpc/boot/dts/hiveap-330.dts

   1 /*
   2  * Aerohive HiveAP-330 Device Tree Source
   3  *
   4  * Copyright (C) 2017 Chris Blake <chrisrblake93@gmail.com>
   5  *
   6  * This program is free software; you can redistribute  it and/or modify it
   7  * under  the terms of  the GNU General  Public License as published by the
   8  * Free Software Foundation;  either version 2 of the  License, or (at your
   9  * option) any later version.
  10  */
  11
  12 /include/ "fsl/p1020si-pre.dtsi"
  13 / {
  14         model = "Aerohive HiveAP-330";
  15         compatible = "aerohive,hiveap-330";
  16
  17         aliases {
  18                 led-boot = &tricolor_green;
  19                 led-failsafe = &tricolor_red;
  20                 led-running = &tricolor_green;
  21                 led-upgrade = &tricolor_red;
  22                 label-mac-device = &enet0;
  23         };
  24
  25         chosen {
  26                 bootargs-override = "console=ttyS0,9600";
  27         };
  28
  29         memory {
  30                 device_type = "memory";
  31         };
  32
  33         board_lbc: lbc: localbus@ffe05000 {
  34                 reg = <0 0xffe05000 0 0x1000>;
  35                 ranges = <0x0 0x0 0x0 0xec000000 0x4000000>;
  36
  37                 nor@0,0 {
  38                         #address-cells = <1>;
  39                         #size-cells = <1>;
  40                         compatible = "cfi-flash";
  41                         reg = <0x0 0x0 0x4000000>;
  42                         bank-width = <2>;
  43                         device-width = <1>;
  44
  45                         partition@0 {
  46                                 reg = <0x0 0x40000>;
  47                                 label = "dtb";
  48                         };
  49
  50                         partition@40000 {
  51                                 reg = <0x40000 0x40000>;
  52                                 label = "initrd";
  53                         };
  54
  55                         partition@80000 {
  56                                 reg = <0x80000 0x27c0000>;
  57                                 label = "rootfs";
  58                         };
  59
  60                         partition@2840000 {
  61                                 reg = <0x2840000 0x800000>;
  62                                 label = "kernel";
  63                         };
  64
  65                         partition@3040000 {
  66                                 reg = <0x3040000 0xec0000>;
  67                                 label = "stock-jffs2";
  68                                 read-only;
  69                         };
  70
  71                         hwinfo: partition@3f00000 {
  72                                 reg = <0x3f00000 0x20000>;
  73                                 label = "hw-info";
  74                                 read-only;
  75                         };
  76
  77                         partition@3f20000 {
  78                                 reg = <0x3f20000 0x20000>;
  79                                 label = "boot-info";
  80                                 read-only;
  81                         };
  82
  83                         partition@3f40000 {
  84                                 reg = <0x3f40000 0x20000>;
  85                                 label = "boot-info-backup";
  86                                 read-only;
  87                         };
  88
  89                         partition@3f60000 {
  90                                 reg = <0x3f60000 0x20000>;
  91                                 label = "u-boot-env";
  92                         };
  93
  94                         partition@3f80000 {
  95                                 reg = <0x3f80000 0x80000>;
  96                                 label = "u-boot";
  97                                 read-only;
  98                         };
  99
 100                         firmware@0 {
 101                                 reg = <0x0 0x3040000>;
 102                                 label = "firmware";
 103                         };
 104                 };
 105         };
 106
 107         board_soc: soc: soc@ffe00000 {
 108                 ranges = <0x0 0x0 0xffe00000 0x100000>;
 109
 110                 i2c@3100 {
 111                         tpm@29 {
 112                                 compatible = "atmel,at97sc3204t";
 113                                 reg = <0x29>;
 114                         };
 115
 116                         lp5521@32 {
 117                                 compatible = "national,lp5521";
 118                                 reg = <0x32>;
 119                                 clock-mode = /bits/ 8 <2>;
 120                                 tricolor_red: chan0 {
 121                                         chan-name = "hiveap-330:red:tricolor0";
 122                                         led-cur = /bits/ 8 <0x2f>;
 123                                         max-cur = /bits/ 8 <0x5f>;
 124                                 };
 125                                 tricolor_green:chan1 {
 126                                         chan-name = "hiveap-330:green:tricolor0";
 127                                         led-cur = /bits/ 8 <0x2f>;
 128                                         max-cur = /bits/ 8 <0x5f>;
 129                                 };
 130                                 chan2 {
 131                                         chan-name = "hiveap-330:blue:tricolor0";
 132                                         led-cur = /bits/ 8 <0x2f>;
 133                                         max-cur = /bits/ 8 <0x5f>;
 134                                 };
 135                         };
 136
 137                         /* Most likely SoC boot config */
 138                         eeprom@51 {
 139                                 compatible = "eeprom";
 140                                 reg = <0x51>;
 141                         };
 142                 };
 143
 144                 mdio@24000 {
 145                         phy0: ethernet-phy@0 {
 146                                 interrupts = <3 1 0 0>;
 147                                 reg = <0x1>;
 148                         };
 149
 150                         phy1: ethernet-phy@1 {
 151                                 interrupts = <2 1 0 0>;
 152                                 reg = <0x2>;
 153                         };
 154                 };
 155
 156                 mdio@25000 {
 157                         status = "disabled";
 158                 };
 159
 160                 mdio@26000 {
 161                         status = "disabled";
 162                 };
 163
 164                 enet0: ethernet@b0000 {
 165                         status = "okay";
 166                         phy-handle = <&phy0>;
 167                         phy-connection-type = "rgmii-id";
 168                         nvmem-cells = <&macaddr_hwinfo_0>;
 169                         nvmem-cell-names = "mac-address";
 170                 };
 171
 172                 enet1: ethernet@b1000 {
 173                         status = "disabled";
 174                 };
 175
 176                 enet2: ethernet@b2000 {
 177                         status = "okay";
 178                         phy-handle = <&phy1>;
 179                         phy-connection-type = "rgmii-id";
 180                         nvmem-cells = <&macaddr_hwinfo_0>;
 181                         nvmem-cell-names = "mac-address";
 182                         mac-address-increment = <1>;
 183                 };
 184
 185                 gpio0: gpio-controller@fc00 {
 186                 };
 187
 188                 usb@22000 {
 189                         phy_type = "ulpi";
 190                         dr_mode = "host";
 191                 };
 192
 193                 usb@23000 {
 194                         status = "disabled";
 195                 };
 196         };
 197
 198         pci0: pcie@ffe09000 {
 199                 reg = <0x0 0xffe09000 0x0 0x1000>;
 200                 ranges = <0x2000000 0x0 0xa0000000 0x0 0xa0000000 0x0 0x20000000
 201                         0x1000000 0x0 0x00000000 0x0 0xffc30000 0x0 0x10000>;
 202                 pcie@0 {
 203                         ranges = <0x2000000 0x0 0xa0000000
 204                                   0x2000000 0x0 0xa0000000
 205                                   0x0 0x20000000
 206
 207                                   0x1000000 0x0 0x0
 208                                   0x1000000 0x0 0x0
 209                                   0x0 0x100000>;
 210                 };
 211         };
 212
 213         pci1: pcie@ffe0a000 {
 214                 reg = <0x0 0xffe0a000 0x0 0x1000>;
 215                 ranges = <0x2000000 0x0 0xc0000000 0x0 0xc0000000 0x0 0x20000000
 216                       0x1000000 0x0 0x00000000 0x0 0xffc20000 0x0 0x10000>;
 217                 pcie@0 {
 218                         ranges = <0x2000000 0x0 0xc0000000
 219                               0x2000000 0x0 0xc0000000
 220                                   0x0 0x20000000
 221
 222                                   0x1000000 0x0 0x0
 223                                   0x1000000 0x0 0x0
 224                                   0x0 0x100000>;
 225                 };
 226         };
 227
 228         buttons {
 229                 compatible = "gpio-keys";
 230
 231                 reset {
 232                         label = "Reset button";
 233                         gpios = <&gpio0 8 1>; /* active low */
 234                         linux,code = <0x198>; /* KEY_RESTART */
 235                 };
 236         };
 237 };
 238 /include/ "fsl/p1020si-post.dtsi"
 239
 240 &hwinfo {
 241         compatible = "nvmem-cells";
 242         #address-cells = <1>;
 243         #size-cells = <1>;
 244
 245         macaddr_hwinfo_0: macaddr@0 {
 246                 reg = <0x0 0x6>;
 247         };
 248 };