target/linux/mediatek/patches-4.4/0091-net-next-mediatek-WIP.patch

   1 From 34e10b96d5ccb99fb78251051bc5652b09359983 Mon Sep 17 00:00:00 2001
   2 From: John Crispin <blogic@openwrt.org>
   3 Date: Thu, 28 Apr 2016 07:58:22 +0200
   4 Subject: [PATCH 91/91] net-next: mediatek WIP
   5
   6 Signed-off-by: John Crispin <blogic@openwrt.org>
   7 ---
   8  drivers/net/ethernet/mediatek/mtk_eth_soc.c |   89 ++++++++++++---------------
   9  drivers/net/ethernet/mediatek/mtk_eth_soc.h |    5 +-
  10  2 files changed, 44 insertions(+), 50 deletions(-)
  11
  12 diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
  13 index 5d33053..2e05920 100644
  14 --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
  15 +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
  16 @@ -326,7 +326,7 @@ static inline void mtk_irq_disable(struct mtk_eth *eth, u32 mask)
  17         val = mtk_r32(eth, MTK_QDMA_INT_MASK);
  18         mtk_w32(eth, val & ~mask, MTK_QDMA_INT_MASK);
  19         /* flush write */
  20 -       mtk_r32(eth, MTK_QDMA_INT_MASK);
  21 +//     mtk_r32(eth, MTK_QDMA_INT_MASK);
  22         spin_unlock_irqrestore(&eth->irq_lock, flags);
  23  }
  24
  25 @@ -339,7 +339,7 @@ static inline void mtk_irq_enable(struct mtk_eth *eth, u32 mask)
  26         val = mtk_r32(eth, MTK_QDMA_INT_MASK);
  27         mtk_w32(eth, val | mask, MTK_QDMA_INT_MASK);
  28         /* flush write */
  29 -       mtk_r32(eth, MTK_QDMA_INT_MASK);
  30 +//     mtk_r32(eth, MTK_QDMA_INT_MASK);
  31         spin_unlock_irqrestore(&eth->irq_lock, flags);
  32  }
  33
  34 @@ -710,10 +710,26 @@ static inline int mtk_cal_txd_req(struct sk_buff *skb)
  35         return nfrags;
  36  }
  37
  38 +static int mtk_queue_stopped(struct mtk_eth *eth)
  39 +{
  40 +       int i;
  41 +
  42 +       for (i = 0; i < MTK_MAC_COUNT; i++) {
  43 +               if (!eth->netdev[i])
  44 +                       continue;
  45 +               if (netif_queue_stopped(eth->netdev[i]))
  46 +                       return 1;
  47 +       }
  48 +
  49 +       return 0;
  50 +}
  51 +
  52  static void mtk_wake_queue(struct mtk_eth *eth)
  53  {
  54         int i;
  55
  56 +       printk("%s:%s[%d]w\n", __FILE__, __func__, __LINE__);
  57 +
  58         for (i = 0; i < MTK_MAC_COUNT; i++) {
  59                 if (!eth->netdev[i])
  60                         continue;
  61 @@ -725,6 +741,7 @@ static void mtk_stop_queue(struct mtk_eth *eth)
  62  {
  63         int i;
  64
  65 +       printk("%s:%s[%d]s\n", __FILE__, __func__, __LINE__);
  66         for (i = 0; i < MTK_MAC_COUNT; i++) {
  67                 if (!eth->netdev[i])
  68                         continue;
  69 @@ -775,12 +792,9 @@ static int mtk_start_xmit(struct sk_buff *skb, struct net_device *dev)
  70         if (mtk_tx_map(skb, dev, tx_num, ring, gso) < 0)
  71                 goto drop;
  72
  73 -       if (unlikely(atomic_read(&ring->free_count) <= ring->thresh)) {
  74 +       if (unlikely(atomic_read(&ring->free_count) <= ring->thresh))
  75                 mtk_stop_queue(eth);
  76 -               if (unlikely(atomic_read(&ring->free_count) >
  77 -                            ring->thresh))
  78 -                       mtk_wake_queue(eth);
  79 -       }
  80 +
  81         spin_unlock_irqrestore(&eth->page_lock, flags);
  82
  83         return NETDEV_TX_OK;
  84 @@ -927,7 +941,6 @@ static int mtk_poll_tx(struct mtk_eth *eth, int budget)
  85                 }
  86                 mtk_tx_unmap(eth->dev, tx_buf);
  87
  88 -               ring->last_free->txd2 = next_cpu;
  89                 ring->last_free = desc;
  90                 atomic_inc(&ring->free_count);
  91
  92 @@ -945,11 +958,8 @@ static int mtk_poll_tx(struct mtk_eth *eth, int budget)
  93                 netdev_completed_queue(eth->netdev[i], done, bytes);
  94         }
  95
  96 -       /* read hw index again make sure no new tx packet */
  97 -       if (cpu == dma && cpu == mtk_r32(eth, MTK_QTX_DRX_PTR))
  98 -               mtk_w32(eth, MTK_TX_DONE_INT, MTK_QMTK_INT_STATUS);
  99 -
 100 -       if (atomic_read(&ring->free_count) > ring->thresh)
 101 +       if (mtk_queue_stopped(eth) &&
 102 +           (atomic_read(&ring->free_count) > ring->thresh))
 103                 mtk_wake_queue(eth);
 104
 105         return done;
 106 @@ -973,10 +983,11 @@ static int mtk_napi_tx(struct napi_struct *napi, int budget)
 107         int tx_done = 0;
 108
 109         mtk_handle_status_irq(eth);
 110 -
 111 -       status = mtk_r32(eth, MTK_QMTK_INT_STATUS);
 112 +       mtk_w32(eth, MTK_TX_DONE_INT, MTK_QMTK_INT_STATUS);
 113         tx_done = mtk_poll_tx(eth, budget);
 114 +
 115         if (unlikely(netif_msg_intr(eth))) {
 116 +               status = mtk_r32(eth, MTK_QMTK_INT_STATUS);
 117                 mask = mtk_r32(eth, MTK_QDMA_INT_MASK);
 118                 dev_info(eth->dev,
 119                          "done tx %d, intr 0x%08x/0x%x\n",
 120 @@ -1002,9 +1013,12 @@ static int mtk_napi_rx(struct napi_struct *napi, int budget)
 121         u32 status, mask;
 122         int rx_done = 0;
 123
 124 -       status = mtk_r32(eth, MTK_QMTK_INT_STATUS);
 125 +       mtk_handle_status_irq(eth);
 126 +       mtk_w32(eth, MTK_RX_DONE_INT, MTK_QMTK_INT_STATUS);
 127         rx_done = mtk_poll_rx(napi, budget, eth);
 128 +
 129         if (unlikely(netif_msg_intr(eth))) {
 130 +               status = mtk_r32(eth, MTK_QMTK_INT_STATUS);
 131                 mask = mtk_r32(eth, MTK_QDMA_INT_MASK);
 132                 dev_info(eth->dev,
 133                          "done rx %d, intr 0x%08x/0x%x\n",
 134 @@ -1052,9 +1066,8 @@ static int mtk_tx_alloc(struct mtk_eth *eth)
 135
 136         atomic_set(&ring->free_count, MTK_DMA_SIZE - 2);
 137         ring->next_free = &ring->dma[0];
 138 -       ring->last_free = &ring->dma[MTK_DMA_SIZE - 2];
 139 -       ring->thresh = max((unsigned long)MTK_DMA_SIZE >> 2,
 140 -                             MAX_SKB_FRAGS);
 141 +       ring->last_free = &ring->dma[MTK_DMA_SIZE - 1];
 142 +       ring->thresh = MAX_SKB_FRAGS;
 143
 144         /* make sure that all changes to the dma ring are flushed before we
 145          * continue
 146 @@ -1259,21 +1272,11 @@ static void mtk_tx_timeout(struct net_device *dev)
 147  static irqreturn_t mtk_handle_irq_rx(int irq, void *_eth)
 148  {
 149         struct mtk_eth *eth = _eth;
 150 -       u32 status;
 151 -
 152 -       status = mtk_r32(eth, MTK_QMTK_INT_STATUS);
 153 -       status &= ~MTK_TX_DONE_INT;
 154 -
 155 -       if (unlikely(!status))
 156 -               return IRQ_NONE;
 157
 158 -       if (status & MTK_RX_DONE_INT) {
 159 -               if (likely(napi_schedule_prep(&eth->rx_napi))) {
 160 -                       mtk_irq_disable(eth, MTK_RX_DONE_INT);
 161 -                       __napi_schedule(&eth->rx_napi);
 162 -               }
 163 +       if (likely(napi_schedule_prep(&eth->rx_napi))) {
 164 +               __napi_schedule(&eth->rx_napi);
 165 +               mtk_irq_disable(eth, MTK_RX_DONE_INT);
 166         }
 167 -       mtk_w32(eth, status, MTK_QMTK_INT_STATUS);
 168
 169         return IRQ_HANDLED;
 170  }
 171 @@ -1281,21 +1284,11 @@ static irqreturn_t mtk_handle_irq_rx(int irq, void *_eth)
 172  static irqreturn_t mtk_handle_irq_tx(int irq, void *_eth)
 173  {
 174         struct mtk_eth *eth = _eth;
 175 -       u32 status;
 176 -
 177 -       status = mtk_r32(eth, MTK_QMTK_INT_STATUS);
 178 -       status &= ~MTK_RX_DONE_INT;
 179 -
 180 -       if (unlikely(!status))
 181 -               return IRQ_NONE;
 182
 183 -       if (status & MTK_TX_DONE_INT) {
 184 -               if (likely(napi_schedule_prep(&eth->tx_napi))) {
 185 -                       mtk_irq_disable(eth, MTK_TX_DONE_INT);
 186 -                       __napi_schedule(&eth->tx_napi);
 187 -               }
 188 +       if (likely(napi_schedule_prep(&eth->tx_napi))) {
 189 +               __napi_schedule(&eth->tx_napi);
 190 +               mtk_irq_disable(eth, MTK_TX_DONE_INT);
 191         }
 192 -       mtk_w32(eth, status, MTK_QMTK_INT_STATUS);
 193
 194         return IRQ_HANDLED;
 195  }
 196 @@ -1326,7 +1319,7 @@ static int mtk_start_dma(struct mtk_eth *eth)
 197         mtk_w32(eth,
 198                 MTK_TX_WB_DDONE | MTK_RX_DMA_EN | MTK_TX_DMA_EN |
 199                 MTK_RX_2B_OFFSET | MTK_DMA_SIZE_16DWORDS |
 200 -               MTK_RX_BT_32DWORDS,
 201 +               MTK_RX_BT_32DWORDS | MTK_NDP_CO_PRO,
 202                 MTK_QDMA_GLO_CFG);
 203
 204         return 0;
 205 @@ -1440,7 +1433,7 @@ static int __init mtk_hw_init(struct mtk_eth *eth)
 206
 207         /* disable delay and normal interrupt */
 208         mtk_w32(eth, 0, MTK_QDMA_DELAY_INT);
 209 -       mtk_irq_disable(eth, MTK_TX_DONE_INT | MTK_RX_DONE_INT);
 210 +       mtk_irq_disable(eth, ~0);
 211         mtk_w32(eth, RST_GL_PSE, MTK_RST_GL);
 212         mtk_w32(eth, 0, MTK_RST_GL);
 213
 214 @@ -1765,7 +1758,7 @@ static int mtk_add_mac(struct mtk_eth *eth, struct device_node *np)
 215         mac->hw_stats->reg_offset = id * MTK_STAT_OFFSET;
 216
 217         SET_NETDEV_DEV(eth->netdev[id], eth->dev);
 218 -       eth->netdev[id]->watchdog_timeo = HZ;
 219 +       eth->netdev[id]->watchdog_timeo = 4 * HZ;
 220         eth->netdev[id]->netdev_ops = &mtk_netdev_ops;
 221         eth->netdev[id]->base_addr = (unsigned long)eth->base;
 222         eth->netdev[id]->vlan_features = MTK_HW_FEATURES &
 223 diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.h b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
 224 index 5093518..6b22445 100644
 225 --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
 226 +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
 227 @@ -18,9 +18,9 @@
 228  #define MTK_QDMA_PAGE_SIZE     2048
 229  #define        MTK_MAX_RX_LENGTH       1536
 230  #define MTK_TX_DMA_BUF_LEN     0x3fff
 231 -#define MTK_DMA_SIZE           256
 232 -#define MTK_NAPI_WEIGHT                64
 233  #define MTK_MAC_COUNT          2
 234 +#define MTK_DMA_SIZE           (256 * MTK_MAC_COUNT)
 235 +#define MTK_NAPI_WEIGHT                (64 * MTK_MAC_COUNT)
 236  #define MTK_RX_ETH_HLEN                (VLAN_ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN)
 237  #define MTK_RX_HLEN            (NET_SKB_PAD + MTK_RX_ETH_HLEN + NET_IP_ALIGN)
 238  #define MTK_DMA_DUMMY_DESC     0xffffffff
 239 @@ -95,6 +95,7 @@
 240  #define MTK_QDMA_GLO_CFG       0x1A04
 241  #define MTK_RX_2B_OFFSET       BIT(31)
 242  #define MTK_RX_BT_32DWORDS     (3 << 11)
 243 +#define MTK_NDP_CO_PRO          BIT(10)
 244  #define MTK_TX_WB_DDONE                BIT(6)
 245  #define MTK_DMA_SIZE_16DWORDS  (2 << 4)
 246  #define MTK_RX_DMA_BUSY                BIT(3)
 247 --
 248 1.7.10.4
 249