mediatek: backport upstream mediatek patches
[openwrt/staging/lynxis.git] / target / linux / mediatek / patches-4.14 / 0134-dt-bindings-usb-mtk-xhci-remove-dummy-clocks-and-add.patch
1 From a96468412cac8abd66667c322fbcda756cc3abc9 Mon Sep 17 00:00:00 2001
2 From: Chunfeng Yun <chunfeng.yun@mediatek.com>
3 Date: Fri, 13 Oct 2017 16:26:41 +0800
4 Subject: [PATCH 134/224] dt-bindings: usb: mtk-xhci: remove dummy clocks and
5 add optional ones
6
7 Remove dummy clocks for usb wakeup and add optional ones for
8 MCU_BUS_CK and DMA_BUS_CK.
9
10 Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
11 Acked-by: Rob Herring <robh@kernel.org>
12 Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
13 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
14 ---
15 .../devicetree/bindings/usb/mediatek,mtk-xhci.txt | 18 ++++++++----------
16 1 file changed, 8 insertions(+), 10 deletions(-)
17
18 diff --git a/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.txt b/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.txt
19 index 2d9b459bd890..30595964876a 100644
20 --- a/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.txt
21 +++ b/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.txt
22 @@ -26,10 +26,11 @@ Required properties:
23 - clocks : a list of phandle + clock-specifier pairs, one for each
24 entry in clock-names
25 - clock-names : must contain
26 - "sys_ck": for clock of xHCI MAC
27 - "ref_ck": for reference clock of xHCI MAC
28 - "wakeup_deb_p0": for USB wakeup debounce clock of port0
29 - "wakeup_deb_p1": for USB wakeup debounce clock of port1
30 + "sys_ck": controller clock used by normal mode,
31 + the following ones are optional:
32 + "ref_ck": reference clock used by low power mode etc,
33 + "mcu_ck": mcu_bus clock for register access,
34 + "dma_ck": dma_bus clock for data transfer by DMA
35
36 - phys : a list of phandle + phy specifier pairs
37
38 @@ -57,9 +58,7 @@ usb30: usb@11270000 {
39 clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>,
40 <&pericfg CLK_PERI_USB0>,
41 <&pericfg CLK_PERI_USB1>;
42 - clock-names = "sys_ck", "ref_ck",
43 - "wakeup_deb_p0",
44 - "wakeup_deb_p1";
45 + clock-names = "sys_ck", "ref_ck";
46 phys = <&phy_port0 PHY_TYPE_USB3>,
47 <&phy_port1 PHY_TYPE_USB2>;
48 vusb33-supply = <&mt6397_vusb_reg>;
49 @@ -91,9 +90,8 @@ Required properties:
50
51 - clocks : a list of phandle + clock-specifier pairs, one for each
52 entry in clock-names
53 - - clock-names : must be
54 - "sys_ck": for clock of xHCI MAC
55 - "ref_ck": for reference clock of xHCI MAC
56 + - clock-names : must contain "sys_ck", and the following ones are optional:
57 + "ref_ck", "mcu_ck" and "dma_ck"
58
59 Optional properties:
60 - vbus-supply : reference to the VBUS regulator;
61 --
62 2.11.0
63