target/linux/mediatek/patches/0042-ARM-mediatek-add-smp-bringup-code.patch

   1 From daa2c1f9202f08628d4f91a1cf4dafb44c9bcafe Mon Sep 17 00:00:00 2001
   2 From: "Joe.C" <yingjoe.chen@mediatek.com>
   3 Date: Fri, 1 May 2015 15:43:28 +0800
   4 Subject: [PATCH 42/76] ARM: mediatek: add smp bringup code
   5
   6 Add support for booting secondary CPUs on mt6589, mt8127
   7 and mt8135.
   8
   9 Signed-off-by: Yingjoe Chen <yingjoe.chen@mediatek.com>
  10 ---
  11  arch/arm/mach-mediatek/Makefile  |    3 +
  12  arch/arm/mach-mediatek/platsmp.c |  145 ++++++++++++++++++++++++++++++++++++++
  13  2 files changed, 148 insertions(+)
  14  create mode 100644 arch/arm/mach-mediatek/platsmp.c
  15
  16 --- a/arch/arm/mach-mediatek/Makefile
  17 +++ b/arch/arm/mach-mediatek/Makefile
  18 @@ -1 +1,4 @@
  19 +ifeq ($(CONFIG_SMP),y)
  20 +obj-$(CONFIG_ARCH_MEDIATEK) += platsmp.o
  21 +endif
  22  obj-$(CONFIG_ARCH_MEDIATEK) += mediatek.o
  23 --- /dev/null
  24 +++ b/arch/arm/mach-mediatek/platsmp.c
  25 @@ -0,0 +1,145 @@
  26 +/*
  27 + * arch/arm/mach-mediatek/platsmp.c
  28 + *
  29 + * Copyright (c) 2014 Mediatek Inc.
  30 + * Author: Shunli Wang <shunli.wang@mediatek.com>
  31 + *         Yingjoe Chen <yingjoe.chen@mediatek.com>
  32 + *
  33 + * This program is free software; you can redistribute it and/or modify
  34 + * it under the terms of the GNU General Public License version 2 as
  35 + * published by the Free Software Foundation.
  36 + *
  37 + * This program is distributed in the hope that it will be useful,
  38 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
  39 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  40 + * GNU General Public License for more details.
  41 + *
  42 + */
  43 +#include <linux/io.h>
  44 +#include <linux/memblock.h>
  45 +#include <linux/of.h>
  46 +#include <linux/of_address.h>
  47 +#include <linux/string.h>
  48 +#include <linux/threads.h>
  49 +
  50 +#define MTK_MAX_CPU            8
  51 +#define MTK_SMP_REG_SIZE       0x1000
  52 +
  53 +struct mtk_smp_boot_info {
  54 +       unsigned long smp_base;
  55 +       unsigned int jump_reg;
  56 +       unsigned int boot_reg;
  57 +       unsigned int core_keys[MTK_MAX_CPU - 1];
  58 +       unsigned int core_regs[MTK_MAX_CPU - 1];
  59 +};
  60 +
  61 +static const struct mtk_smp_boot_info mtk_mt8135_tz_boot = {
  62 +       0x80002000, 1020, 1012,
  63 +       { 0x534c4131, 0x4c415332, 0x41534c33 },
  64 +       { 1016, 1016, 1016},
  65 +};
  66 +
  67 +static const struct mtk_smp_boot_info mtk_mt6589_boot = {
  68 +       0x10002000, 0x34, 0x30,
  69 +       { 0x534c4131, 0x4c415332, 0x41534c33 },
  70 +       { 0x38, 0x3c, 0x40 },
  71 +};
  72 +
  73 +static const struct of_device_id mtk_tz_smp_boot_infos[] __initconst = {
  74 +       { .compatible   = "mediatek,mt8135", .data = &mtk_mt8135_tz_boot },
  75 +       { .compatible   = "mediatek,mt8127", .data = &mtk_mt8135_tz_boot },
  76 +};
  77 +
  78 +static const struct of_device_id mtk_smp_boot_infos[] __initconst = {
  79 +       { .compatible   = "mediatek,mt6589", .data = &mtk_mt6589_boot },
  80 +};
  81 +
  82 +static void __iomem *mtk_smp_base;
  83 +static const struct mtk_smp_boot_info *mtk_smp_info;
  84 +
  85 +static int mtk_boot_secondary(unsigned int cpu, struct task_struct *idle)
  86 +{
  87 +       if (!mtk_smp_base)
  88 +               return -EINVAL;
  89 +
  90 +       if (!mtk_smp_info->core_keys[cpu-1])
  91 +               return -EINVAL;
  92 +
  93 +       writel_relaxed(mtk_smp_info->core_keys[cpu-1],
  94 +               mtk_smp_base + mtk_smp_info->core_regs[cpu-1]);
  95 +
  96 +       arch_send_wakeup_ipi_mask(cpumask_of(cpu));
  97 +
  98 +       return 0;
  99 +}
 100 +
 101 +static void __init __mtk_smp_prepare_cpus(unsigned int max_cpus, int trustzone)
 102 +{
 103 +       int i, num;
 104 +       const struct of_device_id *infos;
 105 +
 106 +       if (trustzone) {
 107 +               num = ARRAY_SIZE(mtk_tz_smp_boot_infos);
 108 +               infos = mtk_tz_smp_boot_infos;
 109 +       } else {
 110 +               num = ARRAY_SIZE(mtk_smp_boot_infos);
 111 +               infos = mtk_smp_boot_infos;
 112 +       }
 113 +
 114 +       /* Find smp boot info for this SoC */
 115 +       for (i = 0; i < num; i++) {
 116 +               if (of_machine_is_compatible(infos[i].compatible)) {
 117 +                       mtk_smp_info = infos[i].data;
 118 +                       break;
 119 +               }
 120 +       }
 121 +
 122 +       if (!mtk_smp_info) {
 123 +               pr_err("%s: Device is not supported\n", __func__);
 124 +               return;
 125 +       }
 126 +
 127 +       if (trustzone) {
 128 +               if (memblock_reserve(mtk_smp_info->smp_base, MTK_SMP_REG_SIZE)) {
 129 +                       pr_err("%s: Can't reserve smp memory\n", __func__);
 130 +                       return;
 131 +               }
 132 +               mtk_smp_base = phys_to_virt(mtk_smp_info->smp_base);
 133 +       } else {
 134 +               mtk_smp_base = ioremap(mtk_smp_info->smp_base, MTK_SMP_REG_SIZE);
 135 +               if (!mtk_smp_base) {
 136 +                       pr_err("%s: Can't remap %lx\n", __func__,
 137 +                               mtk_smp_info->smp_base);
 138 +                       return;
 139 +               }
 140 +       }
 141 +
 142 +       /*
 143 +        * write the address of slave startup address into the system-wide
 144 +        * jump register
 145 +        */
 146 +       writel_relaxed(virt_to_phys(secondary_startup),
 147 +                       mtk_smp_base + mtk_smp_info->jump_reg);
 148 +}
 149 +
 150 +static void __init mtk_tz_smp_prepare_cpus(unsigned int max_cpus)
 151 +{
 152 +       __mtk_smp_prepare_cpus(max_cpus, 1);
 153 +}
 154 +
 155 +static void __init mtk_smp_prepare_cpus(unsigned int max_cpus)
 156 +{
 157 +       __mtk_smp_prepare_cpus(max_cpus, 0);
 158 +}
 159 +
 160 +static struct smp_operations mt81xx_tz_smp_ops __initdata = {
 161 +       .smp_prepare_cpus = mtk_tz_smp_prepare_cpus,
 162 +       .smp_boot_secondary = mtk_boot_secondary,
 163 +};
 164 +CPU_METHOD_OF_DECLARE(mt81xx_tz_smp, "mediatek,mt81xx-tz-smp", &mt81xx_tz_smp_ops);
 165 +
 166 +static struct smp_operations mt65xx_smp_ops __initdata = {
 167 +       .smp_prepare_cpus = mtk_smp_prepare_cpus,
 168 +       .smp_boot_secondary = mtk_boot_secondary,
 169 +};
 170 +CPU_METHOD_OF_DECLARE(mt65xx_smp, "mediatek,mt65xx-smp", &mt65xx_smp_ops);