target/linux/mediatek/dts/mt7986a-tplink-tl-xdr-common.dtsi

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include <dt-bindings/gpio/gpio.h>
   4 #include <dt-bindings/input/input.h>
   5
   6 #include "mt7986a.dtsi"
   7
   8 / {
   9         aliases {
  10                 serial0 = &uart0;
  11                 label-mac-device = &gmac0;
  12                 led-boot = &led_status_green;
  13                 led-failsafe = &led_status_red;
  14                 led-running = &led_status_green;
  15                 led-upgrade = &led_status_red;
  16         };
  17
  18         chosen {
  19                 stdout-path = "serial0:115200n8";
  20         };
  21
  22         memory {
  23                 reg = <0 0x40000000 0 0x20000000>;
  24         };
  25
  26         reg_3p3v: regulator-3p3v {
  27                 compatible = "regulator-fixed";
  28                 regulator-name = "fixed-3.3V";
  29                 regulator-min-microvolt = <3300000>;
  30                 regulator-max-microvolt = <3300000>;
  31                 regulator-boot-on;
  32                 regulator-always-on;
  33         };
  34
  35         reg_5v: regulator-5v {
  36                 compatible = "regulator-fixed";
  37                 regulator-name = "fixed-5V";
  38                 regulator-min-microvolt = <5000000>;
  39                 regulator-max-microvolt = <5000000>;
  40                 regulator-boot-on;
  41                 regulator-always-on;
  42         };
  43
  44         keys {
  45                 compatible = "gpio-keys";
  46
  47                 reset {
  48                         label = "reset";
  49                         linux,code = <KEY_RESTART>;
  50                         gpios = <&pio 9 GPIO_ACTIVE_LOW>;
  51                 };
  52
  53                 wps {
  54                         label = "wps";
  55                         linux,code = <KEY_WPS_BUTTON>;
  56                         gpios = <&pio 10 GPIO_ACTIVE_LOW>;
  57                 };
  58
  59                 turbo {
  60                         label = "turbo";
  61                         linux,code = <BTN_1>;
  62                         gpios = <&pio 11 GPIO_ACTIVE_LOW>;
  63                 };
  64         };
  65
  66         leds {
  67                 compatible = "gpio-leds";
  68
  69                 led_status_red: status_red {
  70                         label = "red:status";
  71                         gpios = <&pio 7 GPIO_ACTIVE_HIGH>;
  72                 };
  73
  74                 led_status_green: status_green {
  75                         label = "green:status";
  76                         gpios = <&pio 8 GPIO_ACTIVE_HIGH>;
  77                 };
  78
  79                 turbo {
  80                         label = "green:turbo";
  81                         gpios = <&pio 12 GPIO_ACTIVE_HIGH>;
  82                 };
  83         };
  84 };
  85
  86 &crypto {
  87         status = "okay";
  88 };
  89
  90 &eth {
  91         status = "okay";
  92
  93         gmac0: mac@0 {
  94                 compatible = "mediatek,eth-mac";
  95                 reg = <0>;
  96                 phy-mode = "2500base-x";
  97
  98                 nvmem-cells = <&macaddr_config_1c 0>;
  99                 nvmem-cell-names = "mac-address";
 100
 101                 fixed-link {
 102                         speed = <2500>;
 103                         full-duplex;
 104                         pause;
 105                 };
 106         };
 107
 108         gmac1: mac@1 {
 109                 compatible = "mediatek,eth-mac";
 110                 reg = <1>;
 111                 phy-handle = <&phy7>;
 112                 phy-mode = "2500base-x";
 113
 114                 nvmem-cells = <&macaddr_config_1c 1>;
 115                 nvmem-cell-names = "mac-address";
 116         };
 117
 118         mdio: mdio-bus {
 119                 #address-cells = <1>;
 120                 #size-cells = <0>;
 121         };
 122 };
 123
 124 &mdio {
 125         phy5: ethernet-phy@5 {
 126                 compatible = "ethernet-phy-ieee802.3-c45";
 127                 reg = <5>;
 128                 reset-assert-us = <100000>;
 129                 reset-deassert-us = <100000>;
 130                 reset-gpios = <&pio 13 GPIO_ACTIVE_LOW>;
 131                 realtek,aldps-enable;
 132         };
 133
 134         phy7: ethernet-phy@7 {
 135                 compatible = "ethernet-phy-ieee802.3-c45";
 136                 reg = <7>;
 137                 reset-assert-us = <100000>;
 138                 reset-deassert-us = <100000>;
 139                 reset-gpios = <&pio 17 GPIO_ACTIVE_LOW>;
 140                 realtek,aldps-enable;
 141         };
 142
 143         switch: switch@1f {
 144                 compatible = "mediatek,mt7531";
 145                 reg = <31>;
 146                 reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
 147                 interrupt-controller;
 148                 #interrupt-cells = <1>;
 149                 interrupt-parent = <&pio>;
 150                 interrupts = <66 IRQ_TYPE_LEVEL_HIGH>;
 151         };
 152 };
 153
 154 &spi0 {
 155         pinctrl-names = "default";
 156         pinctrl-0 = <&spi_flash_pins>;
 157         status = "okay";
 158
 159         flash@0 {
 160                 compatible = "spi-nand";
 161                 #address-cells = <1>;
 162                 #size-cells = <1>;
 163                 reg = <0>;
 164
 165                 spi-max-frequency = <20000000>;
 166                 spi-tx-bus-width = <4>;
 167                 spi-rx-bus-width = <4>;
 168
 169                 partitions {
 170                         compatible = "fixed-partitions";
 171                         #address-cells = <1>;
 172                         #size-cells = <1>;
 173
 174                         partition@0 {
 175                                 label = "bl2";
 176                                 reg = <0x000000 0x0100000>;
 177                                 read-only;
 178                         };
 179
 180                         config: partition@100000 {
 181                                 label = "config";
 182                                 reg = <0x100000 0x0060000>;
 183                                 read-only;
 184
 185                                 nvmem-layout {
 186                                         compatible = "fixed-layout";
 187                                         #address-cells = <1>;
 188                                         #size-cells = <1>;
 189
 190                                         macaddr_config_1c: macaddr@1c {
 191                                                 compatible = "mac-base";
 192                                                 reg = <0x1c 0x6>;
 193                                                 #nvmem-cell-cells = <1>;
 194                                         };
 195                                 };
 196                         };
 197
 198                         factory: partition@160000 {
 199                                 label = "factory";
 200                                 reg = <0x160000 0x0060000>;
 201                                 read-only;
 202                         };
 203
 204                         partition@1c0000 {
 205                                 label = "reserved";
 206                                 reg = <0x1c0000 0x01c0000>;
 207                                 read-only;
 208                         };
 209
 210                         partition@380000 {
 211                                 label = "fip";
 212                                 reg = <0x380000 0x0200000>;
 213                                 read-only;
 214                         };
 215
 216                         partition@580000 {
 217                                 label = "ubi";
 218                                 reg = <0x580000 0x7800000>;
 219                         };
 220                 };
 221         };
 222 };
 223
 224 &pio {
 225         spi_flash_pins: spi-flash-pins-33-to-38 {
 226                 mux {
 227                         function = "spi";
 228                         groups = "spi0", "spi0_wp_hold";
 229                 };
 230                 conf-pu {
 231                         pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
 232                         drive-strength = <8>;
 233                         mediatek,pull-up-adv = <0>; /* bias-disable */
 234                 };
 235                 conf-pd {
 236                         pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
 237                         drive-strength = <8>;
 238                         mediatek,pull-down-adv = <0>; /* bias-disable */
 239                 };
 240         };
 241 };
 242
 243 &ssusb {
 244         vusb33-supply = <&reg_3p3v>;
 245         vbus-supply = <&reg_5v>;
 246         status = "okay";
 247 };
 248
 249 &trng {
 250         status = "okay";
 251 };
 252
 253 &uart0 {
 254         status = "okay";
 255 };
 256
 257 &usb_phy {
 258         status = "okay";
 259 };
 260
 261 &watchdog {
 262         status = "okay";
 263 };
 264
 265 &wifi {
 266         mediatek,mtd-eeprom = <&factory 0x0>;
 267         nvmem-cells = <&macaddr_config_1c 2>;
 268         nvmem-cell-names = "mac-address";
 269         status = "okay";
 270 };