target/linux/mediatek/dts/mt7629-iptime-a6004mx.dts

   1 // SPDX-License-Identifier: GPL-2.0
   2
   3 /dts-v1/;
   4 #include <dt-bindings/input/input.h>
   5 #include <dt-bindings/leds/common.h>
   6 #include "mt7629.dtsi"
   7
   8 / {
   9         model = "ipTIME A6004MX";
  10         compatible = "iptime,a6004mx", "mediatek,mt7629";
  11
  12         aliases {
  13                 led-boot = &led_cpu;
  14                 led-failsafe = &led_cpu;
  15                 led-running = &led_cpu;
  16                 led-upgrade = &led_cpu;
  17                 serial0 = &uart0;
  18         };
  19
  20         chosen {
  21                 stdout-path = "serial0:115200n8";
  22                 bootargs-override = "console=ttyS0,115200n8";
  23         };
  24
  25         leds {
  26                 compatible = "gpio-leds";
  27
  28                 led_cpu: cpu {
  29                         function = LED_FUNCTION_CPU;
  30                         color = <LED_COLOR_ID_ORANGE>;
  31                         gpios = <&pio 57 GPIO_ACTIVE_LOW>;
  32                 };
  33
  34                 wlan5g {
  35                         label = "orange:wlan5g";
  36                         gpios = <&pio 22 GPIO_ACTIVE_LOW>;
  37                         // linux,default-trigger = "phy0radio";
  38                 };
  39
  40                 wlan2g {
  41                         label = "orange:wlan2g";
  42                         gpios = <&pio 21 GPIO_ACTIVE_LOW>;
  43                         // linux,default-trigger = "phy1radio";
  44                 };
  45
  46                 wan {
  47                         function = LED_FUNCTION_WAN;
  48                         color = <LED_COLOR_ID_ORANGE>;
  49                         gpios = <&pio 12 GPIO_ACTIVE_HIGH>;
  50                 };
  51         };
  52
  53         keys {
  54                 compatible = "gpio-keys";
  55
  56                 reset {
  57                         label = "factory";
  58                         linux,code = <KEY_RESTART>;
  59                         gpios = <&pio 60 GPIO_ACTIVE_LOW>;
  60                 };
  61
  62                 wps {
  63                         label = "wps";
  64                         linux,code = <KEY_WPS_BUTTON>;
  65                         gpios = <&pio 58 GPIO_ACTIVE_LOW>;
  66                 };
  67         };
  68
  69         memory@40000000 {
  70                 device_type = "memory";
  71                 reg = <0x40000000 0x10000000>;
  72         };
  73
  74         reg_3p3v: regulator-3p3v {
  75                 compatible = "regulator-fixed";
  76                 regulator-name = "fixed-3.3V";
  77                 regulator-min-microvolt = <3300000>;
  78                 regulator-max-microvolt = <3300000>;
  79                 regulator-boot-on;
  80                 regulator-always-on;
  81         };
  82
  83         reg_5v: regulator-5v {
  84                 compatible = "regulator-fixed";
  85                 regulator-name = "fixed-5V";
  86                 regulator-min-microvolt = <5000000>;
  87                 regulator-max-microvolt = <5000000>;
  88                 regulator-boot-on;
  89                 regulator-always-on;
  90         };
  91 };
  92
  93 &eth {
  94         pinctrl-names = "default";
  95         pinctrl-0 = <&eth_pins>;
  96         pinctrl-1 = <&ephy_leds_pins>;
  97         status = "okay";
  98
  99         gmac0: mac@0 {
 100                 compatible = "mediatek,eth-mac";
 101                 reg = <0>;
 102                 phy-mode = "2500base-x";
 103                 nvmem-cells = <&macaddr_factory_4 3>;
 104                 nvmem-cell-names = "mac-address";
 105
 106                 fixed-link {
 107                         speed = <2500>;
 108                         full-duplex;
 109                         pause;
 110                 };
 111         };
 112
 113         gmac1: mac@1 {
 114                 compatible = "mediatek,eth-mac";
 115                 reg = <1>;
 116                 phy-mode = "gmii";
 117                 phy-handle = <&phy0>;
 118                 nvmem-cells = <&macaddr_factory_4 1>;
 119                 nvmem-cell-names = "mac-address";
 120         };
 121
 122         mdio: mdio-bus {
 123                 #address-cells = <1>;
 124                 #size-cells = <0>;
 125
 126                 phy0: ethernet-phy@0 {
 127                         reg = <0>;
 128                 };
 129
 130                 switch@1f {
 131                         compatible = "mediatek,mt7531";
 132                         reg = <31>;
 133                         reset-gpios = <&pio 28 0>;
 134                         interrupt-controller;
 135                         #interrupt-cells = <1>;
 136                         interrupt-parent = <&pio>;
 137                         interrupts = <6 IRQ_TYPE_LEVEL_HIGH>;
 138
 139                         ports {
 140                                 #address-cells = <1>;
 141                                 #size-cells = <0>;
 142
 143                                 port@0 {
 144                                         reg = <0>;
 145                                         label = "lan1";
 146                                 };
 147
 148                                 port@1 {
 149                                         reg = <1>;
 150                                         label = "lan2";
 151                                 };
 152
 153                                 port@2 {
 154                                         reg = <2>;
 155                                         label = "lan3";
 156                                 };
 157
 158                                 port@3 {
 159                                         reg = <3>;
 160                                         label = "lan4";
 161                                 };
 162
 163                                 port@6 {
 164                                         reg = <6>;
 165                                         ethernet = <&gmac0>;
 166                                         phy-mode = "2500base-x";
 167
 168                                         fixed-link {
 169                                                 speed = <2500>;
 170                                                 full-duplex;
 171                                                 pause;
 172                                         };
 173                                 };
 174                         };
 175                 };
 176         };
 177 };
 178
 179 &bch {
 180         status = "okay";
 181 };
 182
 183 &snfi {
 184         pinctrl-names = "default";
 185         pinctrl-0 = <&serial_nand_pins>;
 186         status = "okay";
 187         flash@0 {
 188                 compatible = "spi-nand";
 189                 reg = <0>;
 190                 spi-tx-bus-width = <4>;
 191                 spi-rx-bus-width = <4>;
 192                 nand-ecc-engine = <&snfi>;
 193                 mediatek,bmt-v2;
 194
 195                 partitions {
 196                         compatible = "fixed-partitions";
 197                         #address-cells = <1>;
 198                         #size-cells = <1>;
 199
 200                         partition@0 {
 201                                 label = "Bootloader";
 202                                 reg = <0x0 0x100000>;
 203                                 read-only;
 204                         };
 205
 206                         partition@100000 {
 207                                 label = "Config";
 208                                 reg = <0x100000 0x40000>;
 209                         };
 210
 211                         partition@140000 {
 212                                 label = "factory";
 213                                 reg = <0x140000 0x80000>;
 214                                 read-only;
 215
 216                                 nvmem-layout {
 217                                         compatible = "fixed-layout";
 218                                         #address-cells = <1>;
 219                                         #size-cells = <1>;
 220
 221                                         macaddr_factory_4: macaddr@4 {
 222                                                 compatible = "mac-base";
 223                                                 reg = <0x4 0x6>;
 224                                                 #nvmem-cell-cells = <1>;
 225                                         };
 226                                 };
 227                         };
 228
 229                         partition@1c0000 {
 230                                 label = "firmware";
 231                                 reg = <0x1c0000 0x7400000>;
 232                                 compatible = "denx,fit";
 233                                 openwrt,fit-offset = <0x800>;
 234                         };
 235                 };
 236         };
 237 };
 238
 239 &pio {
 240         eth_pins: eth-pins {
 241                 mux {
 242                         function = "eth";
 243                         groups = "mdc_mdio";
 244                 };
 245         };
 246
 247         ephy_leds_pins: ephy-leds-pins {
 248                 mux {
 249                         function = "led";
 250                         groups = "ephy_leds";
 251                 };
 252         };
 253
 254         /* Serial NAND is shared pin with SPI-NOR */
 255         serial_nand_pins: serial-nand-pins {
 256                 mux {
 257                         function = "flash";
 258                         groups = "snfi";
 259                 };
 260         };
 261
 262         uart0_pins: uart0-pins {
 263                 mux {
 264                         function = "uart";
 265                         groups = "uart0_txd_rxd" ;
 266                 };
 267         };
 268
 269         watchdog_pins: watchdog-pins {
 270                 mux {
 271                         function = "watchdog";
 272                         groups = "watchdog";
 273                 };
 274         };
 275 };
 276
 277 &ssusb {
 278         vusb33-supply = <&reg_3p3v>;
 279         vbus-supply = <&reg_5v>;
 280         status = "okay";
 281 };
 282
 283 &uart0 {
 284         pinctrl-names = "default";
 285         pinctrl-0 = <&uart0_pins>;
 286         status = "okay";
 287 };
 288
 289 &watchdog {
 290         pinctrl-names = "default";
 291         pinctrl-0 = <&watchdog_pins>;
 292         status = "okay";
 293
 294         interrupt-controller;
 295         #interrupt-cells = <1>;
 296         interrupt-parent = <&pio>;
 297         interrupts = <GIC_SPI 0x80 IRQ_TYPE_EDGE_FALLING>;
 298 };