mediatek: use mac-base
[openwrt/staging/hauke.git] / target / linux / mediatek / dts / mt7622-xiaomi-redmi-router-ax6s.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 /dts-v1/;
3
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/gpio/gpio.h>
6
7 #include "mt7622.dtsi"
8 #include "mt6380.dtsi"
9
10 / {
11 model = "Xiaomi Redmi Router AX6S";
12 compatible = "xiaomi,redmi-router-ax6s", "mediatek,mt7622";
13
14 aliases {
15 serial0 = &uart0;
16 led-boot = &led_power_amber;
17 led-failsafe = &led_power_amber;
18 led-running = &led_power_blue;
19 led-upgrade = &led_power_blue;
20 };
21
22 chosen {
23 stdout-path = "serial0:115200n8";
24 bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n8 swiotlb=512";
25 };
26
27 memory {
28 reg = <0 0x40000000 0 0x8000000>;
29 };
30
31 leds {
32 compatible = "gpio-leds";
33
34 led_power_blue: power_blue {
35 label = "blue:power";
36 gpios = <&pio 18 GPIO_ACTIVE_LOW>;
37 };
38
39 led_power_amber: power_amber {
40 label = "amber:power";
41 gpios = <&pio 17 GPIO_ACTIVE_LOW>;
42 };
43
44 led_net_blue: net_blue {
45 label = "blue:net";
46 gpios = <&pio 01 GPIO_ACTIVE_LOW>;
47 };
48
49 led_net_amber: net_amber {
50 label = "amber:net";
51 gpios = <&pio 16 GPIO_ACTIVE_LOW>;
52 };
53
54 };
55
56 keys {
57 compatible = "gpio-keys";
58
59 reset {
60 label = "reset";
61 gpios = <&pio 0 GPIO_ACTIVE_LOW>;
62 linux,code = <KEY_RESTART>;
63 };
64
65 mesh {
66 label = "mesh";
67 gpios = <&pio 102 GPIO_ACTIVE_LOW>;
68 linux,code = <BTN_9>;
69 linux,input-type = <EV_SW>;
70 };
71 };
72 };
73
74 &cpu0 {
75 proc-supply = <&mt6380_vcpu_reg>;
76 sram-supply = <&mt6380_vm_reg>;
77 };
78
79 &cpu1 {
80 proc-supply = <&mt6380_vcpu_reg>;
81 sram-supply = <&mt6380_vm_reg>;
82 };
83
84 &pio {
85 eth_pins: eth-pins {
86 mux {
87 function = "eth";
88 groups = "mdc_mdio", "rgmii_via_gmac2";
89 };
90 };
91
92 pcie0_pins: pcie0-pins {
93 mux {
94 function = "pcie";
95 groups = "pcie0_pad_perst",
96 "pcie0_1_waken",
97 "pcie0_1_clkreq";
98 };
99 };
100
101 pmic_bus_pins: pmic-bus-pins {
102 mux {
103 function = "pmic";
104 groups = "pmic_bus";
105 };
106 };
107
108 pwm7_pins: pwm1-2-pins {
109 mux {
110 function = "pwm";
111 groups = "pwm_ch7_2";
112 };
113 };
114
115 /* Serial NAND is shared pin with SPI-NOR */
116 serial_nand_pins: serial-nand-pins {
117 mux {
118 function = "flash";
119 groups = "snfi";
120 };
121 };
122
123 uart0_pins: uart0-pins {
124 mux {
125 function = "uart";
126 groups = "uart0_0_tx_rx" ;
127 };
128 };
129
130 watchdog_pins: watchdog-pins {
131 mux {
132 function = "watchdog";
133 groups = "watchdog";
134 };
135 };
136 };
137
138 &eth {
139 pinctrl-names = "default";
140 pinctrl-0 = <&eth_pins>;
141 status = "okay";
142
143 gmac0: mac@0 {
144 compatible = "mediatek,eth-mac";
145 reg = <0>;
146
147 phy-connection-type = "2500base-x";
148
149 nvmem-cells = <&macaddr_factory_4 (-1)>;
150 nvmem-cell-names = "mac-address";
151
152 fixed-link {
153 speed = <2500>;
154 full-duplex;
155 pause;
156 };
157 };
158
159 mdio-bus {
160 #address-cells = <1>;
161 #size-cells = <0>;
162
163 switch@0 {
164 compatible = "mediatek,mt7531";
165 reg = <0>;
166 interrupt-controller;
167 #interrupt-cells = <1>;
168 interrupt-parent = <&pio>;
169 interrupts = <53 IRQ_TYPE_LEVEL_HIGH>;
170 reset-gpios = <&pio 54 GPIO_ACTIVE_HIGH>;
171
172 ports {
173 #address-cells = <1>;
174 #size-cells = <0>;
175
176 wan: port@1 {
177 reg = <1>;
178 label = "wan";
179 };
180
181 port@2 {
182 reg = <2>;
183 label = "lan1";
184 };
185
186 port@3 {
187 reg = <3>;
188 label = "lan2";
189 };
190
191 port@4 {
192 reg = <4>;
193 label = "lan3";
194 };
195
196 port@6 {
197 reg = <6>;
198 ethernet = <&gmac0>;
199 phy-mode = "2500base-x";
200
201 fixed-link {
202 speed = <2500>;
203 full-duplex;
204 pause;
205 };
206 };
207 };
208 };
209 };
210 };
211
212 &bch {
213 status = "okay";
214 };
215
216 &snfi {
217 pinctrl-names = "default";
218 pinctrl-0 = <&serial_nand_pins>;
219 status = "okay";
220
221 flash@0 {
222 compatible = "spi-nand";
223 reg = <0>;
224 spi-tx-bus-width = <4>;
225 spi-rx-bus-width = <4>;
226 nand-ecc-engine = <&snfi>;
227
228 mediatek,bmt-v2;
229 mediatek,bmt-table-size = <0x1000>;
230 mediatek,bmt-remap-range = <0x0 0x6c0000>;
231
232 partitions {
233 compatible = "fixed-partitions";
234 #address-cells = <1>;
235 #size-cells = <1>;
236
237 partition@0 {
238 label = "Preloader";
239 reg = <0x0 0x80000>;
240 read-only;
241 };
242
243 partition@80000 {
244 label = "ATF";
245 reg = <0x80000 0x40000>;
246 read-only;
247 };
248
249 partition@c0000 {
250 label = "u-boot";
251 reg = <0xc0000 0x80000>;
252 read-only;
253 };
254
255 partition@140000 {
256 label = "u-boot-env";
257 reg = <0x140000 0x40000>;
258 };
259
260 partition@180000 {
261 label = "bdata";
262 reg = <0x180000 0x40000>;
263 };
264
265 factory: partition@1c0000 {
266 label = "factory";
267 reg = <0x1c0000 0x80000>;
268 read-only;
269
270 nvmem-layout {
271 compatible = "fixed-layout";
272 #address-cells = <1>;
273 #size-cells = <1>;
274
275 macaddr_factory_4: macaddr@4 {
276 compatible = "mac-base";
277 reg = <0x4 0x6>;
278 #nvmem-cell-cells = <1>;
279 };
280 };
281 };
282
283 partition@240000 {
284 label = "crash";
285 reg = <0x240000 0x40000>;
286 read-only;
287 };
288
289 partition@280000 {
290 label = "crash_log";
291 reg = <0x280000 0x40000>;
292 read-only;
293 };
294
295 /* Shrunk and renamed from "firmware"
296 * as to not break luci size checks
297 */
298 partition@2c0000 {
299 label = "kernel";
300 reg = <0x2c0000 0x400000>;
301 };
302
303 /* ubi partition is the result of squashing
304 * consecutive stock partitions:
305 * - firmware (partially)
306 * - firmware1
307 * - overlay
308 * - obr
309 */
310 partition@6c0000 {
311 label = "ubi";
312 reg = <0x6C0000 0x6f00000>;
313 };
314 };
315 };
316 };
317
318 &pcie0 {
319 pinctrl-names = "default";
320 pinctrl-0 = <&pcie0_pins>;
321 status = "okay";
322 };
323
324 &slot0 {
325 status = "okay";
326
327 wifi@0,0 {
328 compatible = "mediatek,mt76";
329 reg = <0x0000 0 0 0 0>;
330 mediatek,mtd-eeprom = <&factory 0x5000>;
331 ieee80211-freq-limit = <5000000 6000000>;
332 mediatek,disable-radar-background;
333 };
334 };
335
336 &pwm {
337 pinctrl-names = "default";
338 pinctrl-0 = <&pwm7_pins>;
339 status = "okay";
340 };
341
342 &pwrap {
343 pinctrl-names = "default";
344 pinctrl-0 = <&pmic_bus_pins>;
345 status = "okay";
346 };
347
348 &rtc {
349 status = "disabled";
350 };
351
352 &uart0 {
353 pinctrl-names = "default";
354 pinctrl-0 = <&uart0_pins>;
355 status = "okay";
356 };
357
358 &watchdog {
359 pinctrl-names = "default";
360 pinctrl-0 = <&watchdog_pins>;
361 status = "okay";
362 };
363
364 &wmac {
365 status = "okay";
366
367 mediatek,mtd-eeprom = <&factory 0x0>;
368 };