target/linux/mediatek/dts/mt7622-dlink-eagle-pro-ai-m32-a1.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 /dts-v1/;
   4 #include "mt7622.dtsi"
   5 #include "mt6380.dtsi"
   6 #include <dt-bindings/gpio/gpio.h>
   7 #include <dt-bindings/input/input.h>
   8
   9 / {
  10         model = "D-Link EAGLE PRO AI M32 A1";
  11         compatible = "dlink,eagle-pro-ai-m32-a1", "mediatek,mt7622";
  12
  13         aliases {
  14                 led-boot = &status_orange;
  15                 led-failsafe = &status_red;
  16                 led-running = &status_white;
  17                 led-upgrade = &status_red;
  18                 serial0 = &uart0;
  19                 label-mac-device = &gmac0;
  20         };
  21
  22         chosen {
  23                 stdout-path = "serial0:115200n8";
  24                 bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n8 swiotlb=512";
  25         };
  26
  27         cpus {
  28                 cpu@0 {
  29                         proc-supply = <&mt6380_vcpu_reg>;
  30                         sram-supply = <&mt6380_vm_reg>;
  31                 };
  32
  33                 cpu@1 {
  34                         proc-supply = <&mt6380_vcpu_reg>;
  35                         sram-supply = <&mt6380_vm_reg>;
  36                 };
  37         };
  38
  39         gpio-keys {
  40                 compatible = "gpio-keys";
  41
  42                 reset {
  43                         gpios = <&pio 0 GPIO_ACTIVE_LOW>;
  44                         label = "reset";
  45                         linux,code = <KEY_RESTART>;
  46                 };
  47
  48                 wps {
  49                         gpios = <&pio 102 GPIO_ACTIVE_LOW>;
  50                         label = "wps";
  51                         linux,code = <KEY_WPS_BUTTON>;
  52                 };
  53         };
  54
  55         leds {
  56                 compatible = "gpio-leds";
  57
  58                 status_white: status_white {
  59                         label = "white:status";
  60                         gpios = <&pio 85 GPIO_ACTIVE_LOW>;
  61                 };
  62
  63                 status_orange: status_orange {
  64                         label = "orange:status";
  65                         gpios = <&pio 20 GPIO_ACTIVE_LOW>;
  66                         default-state = "on";
  67                 };
  68
  69                 status_red: status_red {
  70                         label = "red:status";
  71                         gpios = <&pio 17 GPIO_ACTIVE_LOW>;
  72                 };
  73         };
  74
  75         memory {
  76                 reg = <0 0x40000000 0 0x40000000>;
  77         };
  78 };
  79
  80 &bch {
  81         status = "okay";
  82 };
  83
  84 &btif {
  85         status = "okay";
  86 };
  87
  88 &eth {
  89         pinctrl-names = "default";
  90         pinctrl-0 = <&eth_pins>;
  91         status = "okay";
  92
  93         gmac0: mac@0 {
  94                 compatible = "mediatek,eth-mac";
  95                 nvmem-cells = <&macaddr_odm_83>;
  96                 nvmem-cell-names = "mac-address";
  97                 phy-mode = "2500base-x";
  98                 reg = <0>;
  99
 100                 fixed-link {
 101                         full-duplex;
 102                         pause;
 103                         speed = <2500>;
 104                 };
 105         };
 106
 107         mdio-bus {
 108                 #address-cells = <1>;
 109                 #size-cells = <0>;
 110
 111                 switch@0 {
 112                         compatible = "mediatek,mt7531";
 113                         reg = <0>;
 114                         interrupt-controller;
 115                         #interrupt-cells = <1>;
 116                         interrupt-parent = <&pio>;
 117                         interrupts = <53 IRQ_TYPE_LEVEL_HIGH>;
 118                         reset-gpios = <&pio 54 0>;
 119
 120                         ports {
 121                                 #address-cells = <1>;
 122                                 #size-cells = <0>;
 123
 124                                 port@2 {
 125                                         reg = <2>;
 126                                         label = "lan2";
 127                                 };
 128
 129                                 port@3 {
 130                                         reg = <3>;
 131                                         label = "lan1";
 132                                 };
 133
 134                                 wan: port@4 {
 135                                         reg = <4>;
 136                                         label = "wan";
 137                                 };
 138
 139                                 port@6 {
 140                                         reg = <6>;
 141                                         ethernet = <&gmac0>;
 142                                         phy-mode = "2500base-x";
 143
 144                                         fixed-link {
 145                                                 speed = <2500>;
 146                                                 full-duplex;
 147                                                 pause;
 148                                         };
 149                                 };
 150                         };
 151                 };
 152         };
 153 };
 154
 155 &pcie0 {
 156         pinctrl-names = "default";
 157         pinctrl-0 = <&pcie0_pins>;
 158         status = "okay";
 159 };
 160
 161 &pcie1 {
 162         pinctrl-names = "default";
 163         pinctrl-0 = <&pcie1_pins>;
 164         status = "okay";
 165 };
 166
 167 &pio {
 168     epa_elna_pins: epa-elna-pins {
 169                 mux {
 170                         function = "antsel";
 171                         groups = "antsel0", "antsel1", "antsel2", "antsel3",
 172                                   "antsel4", "antsel5", "antsel6", "antsel7",
 173                                   "antsel8", "antsel9", "antsel12", "antsel13",
 174                                   "antsel14", "antsel15", "antsel16", "antsel17";
 175                 };
 176         };
 177
 178         eth_pins: eth-pins {
 179                 mux {
 180                         function = "eth";
 181                         groups = "mdc_mdio", "rgmii_via_gmac2";
 182                 };
 183         };
 184
 185         pcie0_pins: pcie0-pins {
 186                 mux {
 187                         function = "pcie";
 188                         groups = "pcie0_pad_perst",
 189                                  "pcie0_1_waken",
 190                                  "pcie0_1_clkreq";
 191                 };
 192         };
 193
 194         pcie1_pins: pcie1-pins {
 195                 mux {
 196                         function = "pcie";
 197                         groups = "pcie1_pad_perst",
 198                                  "pcie1_0_waken",
 199                                  "pcie1_0_clkreq";
 200                 };
 201         };
 202
 203         pmic_bus_pins: pmic-bus-pins {
 204                 mux {
 205                         function = "pmic";
 206                         groups = "pmic_bus";
 207                 };
 208         };
 209
 210         /* Serial NAND is shared pin with SPI-NOR */
 211         serial_nand_pins: serial-nand-pins {
 212                 mux {
 213                         function = "flash";
 214                         groups = "snfi";
 215                 };
 216         };
 217
 218         uart0_pins: uart0-pins {
 219                 mux {
 220                         function = "uart";
 221                         groups = "uart0_0_tx_rx";
 222                 };
 223         };
 224
 225         watchdog_pins: watchdog-pins {
 226                 mux {
 227                         function = "watchdog";
 228                         groups = "watchdog";
 229                 };
 230         };
 231 };
 232
 233 &pwrap {
 234         pinctrl-names = "default";
 235         pinctrl-0 = <&pmic_bus_pins>;
 236         status = "okay";
 237 };
 238
 239 &rtc {
 240         status = "disabled";
 241 };
 242
 243 &sata {
 244         status = "disabled";
 245 };
 246
 247 &sata_phy {
 248         status = "disabled";
 249 };
 250
 251 &slot0 {
 252         wmac1: mt7915@0,0 {
 253                 reg = <0x0000 0 0 0 0>;
 254                 ieee80211-freq-limit = <5000000 6000000>;
 255                 mediatek,mtd-eeprom = <&factory 0x05000>;
 256         };
 257 };
 258
 259 &snfi {
 260         pinctrl-names = "default";
 261         pinctrl-0 = <&serial_nand_pins>;
 262         status = "okay";
 263
 264         snand: flash@0 {
 265                 compatible = "spi-nand";
 266                 mediatek,bmt-table-size = <0x1000>;
 267                 mediatek,bmt-v2;
 268                 nand-ecc-engine = <&snfi>;
 269                 reg = <0>;
 270                 spi-rx-bus-width = <4>;
 271                 spi-tx-bus-width = <4>;
 272
 273                 partitions {
 274                         compatible = "fixed-partitions";
 275                         #address-cells = <1>;
 276                         #size-cells = <1>;
 277
 278                         partition@0 {
 279                                 label = "Preloader";
 280                                 reg = <0x00000000 0x00080000>;
 281                                 read-only;
 282                         };
 283
 284                         partition@80000 {
 285                                 label = "ATF";
 286                                 reg = <0x00080000 0x00040000>;
 287                                 read-only;
 288                         };
 289
 290                         partition@C0000 {
 291                                 label = "Bootloader";
 292                                 reg = <0x000C0000 0x00080000>;
 293                                 read-only;
 294                         };
 295
 296                         partition@140000 {
 297                                 label = "BootConfig";
 298                                 reg = <0x00140000 0x00040000>;
 299                                 read-only;
 300                         };
 301
 302                         odm: partition@180000 {
 303                                 label = "Odm";
 304                                 reg = <0x00180000 0x00040000>;
 305                                 read-only;
 306
 307                                 nvmem-layout {
 308                                         compatible = "fixed-layout";
 309                                         #address-cells = <1>;
 310                                         #size-cells = <1>;
 311
 312                                         macaddr_odm_83: macaddr@83 {
 313                                                 reg = <0x83 0x6>;
 314                                         };
 315                                 };
 316                         };
 317
 318                         config1: partition@1C0000 {
 319                                 label = "Config1";
 320                                 reg = <0x001C0000 0x00080000>;
 321                                 read-only;
 322                         };
 323
 324                         partition@240000 {
 325                                 label = "Config2";
 326                                 reg = <0x00240000 0x00080000>;
 327                                 read-only;
 328                         };
 329
 330                         partition@2C0000 {
 331                                 label = "Kernel1";
 332                                 reg = <0x002C0000 0x02D00000>;
 333
 334                                 compatible = "fixed-partitions";
 335                                 #address-cells = <1>;
 336                                 #size-cells = <1>;
 337                                 partition@0 {
 338                                         label = "kernel";
 339                                         reg = <0x00000000 0x00800000>;
 340                                 };
 341
 342                                 partition@800000 {
 343                                         label = "ubi";
 344                                         reg = <0x00800000 0x02500000>;
 345                                 };
 346                         };
 347
 348                         partition@2FC0000 {
 349                                 label = "Kernel2";
 350                                 reg = <0x02FC0000 0x02D00000>;
 351                                 read-only;
 352                         };
 353
 354                         factory: partition@5CC0000 {
 355                                 label = "Factory";
 356                                 reg = <0x05CC0000 0x00100000>;
 357                                 read-only;
 358                         };
 359
 360                         partition@5DC0000 {
 361                                 label = "Mydlink";
 362                                 reg = <0x05DC0000 0x00200000>;
 363                                 read-only;
 364                         };
 365
 366                         partition@5FC0000 {
 367                                 label = "Storage";
 368                                 reg = <0x05FC0000 0x00300000>;
 369                                 read-only;
 370                         };
 371                 };
 372         };
 373 };
 374
 375 &ssusb {
 376         status = "disabled";
 377 };
 378
 379 &u3phy {
 380         status = "disabled";
 381 };
 382
 383 &uart0 {
 384         pinctrl-names = "default";
 385         pinctrl-0 = <&uart0_pins>;
 386         status = "okay";
 387 };
 388
 389 &watchdog {
 390         pinctrl-names = "default";
 391         pinctrl-0 = <&watchdog_pins>;
 392         status = "okay";
 393 };
 394
 395 &wmac {
 396         pinctrl-names = "default";
 397         pinctrl-0 = <&epa_elna_pins>;
 398         mediatek,mtd-eeprom = <&factory 0x0000>;
 399         status = "okay";
 400 };
 401