6d77be532b1488255716a88f94b45b7a993b41fa
[openwrt/staging/stintel.git] / target / linux / mediatek / dts / mt7622-buffalo-wsr-2533dhp2.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 /dts-v1/;
3 #include <dt-bindings/input/input.h>
4 #include <dt-bindings/gpio/gpio.h>
5
6 #include "mt7622.dtsi"
7 #include "mt6380.dtsi"
8
9 / {
10 model = "Buffalo WSR-2533DHP2";
11 compatible = "buffalo,wsr-2533dhp2", "mediatek,mt7622";
12
13 aliases {
14 serial0 = &uart0;
15 led-boot = &power_green;
16 led-failsafe = &power_amber;
17 led-running = &power_green;
18 led-upgrade = &power_green;
19 };
20
21 chosen {
22 bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n8 swiotlb=512";
23 };
24
25 memory {
26 reg = <0 0x40000000 0 0x0F000000>;
27 };
28
29 leds {
30 compatible = "gpio-leds";
31
32 wireless_amber {
33 label = "amber:wireless";
34 gpios = <&pio 2 GPIO_ACTIVE_HIGH>;
35 };
36
37 power_amber: power_amber {
38 label = "amber:power";
39 gpios = <&pio 3 GPIO_ACTIVE_LOW>;
40 };
41
42 power_green: power_green {
43 label = "green:power";
44 gpios = <&pio 4 GPIO_ACTIVE_LOW>;
45 default-state = "on";
46 };
47
48 wireless_green {
49 label = "green:wireless";
50 gpios = <&pio 15 GPIO_ACTIVE_HIGH>;
51 };
52
53 internet {
54 label = "green:internet";
55 gpios = <&pio 19 GPIO_ACTIVE_HIGH>;
56 };
57
58 router {
59 label = "green:router";
60 gpios = <&pio 20 GPIO_ACTIVE_HIGH>;
61 };
62 };
63
64 keys {
65 compatible = "gpio-keys";
66 poll-interval = <100>;
67
68 reset {
69 label = "reset";
70 gpios = <&pio 0 GPIO_ACTIVE_LOW>;
71 linux,code = <KEY_RESTART>;
72 };
73
74 /* GPIO 1 and 16 are a tri-state switch button with
75 * ROUTER / AP / WB.
76 */
77 router {
78 label = "router";
79 gpios = <&pio 1 GPIO_ACTIVE_LOW>;
80 linux,code = <BTN_0>;
81 linux,input-type = <EV_SW>;
82 };
83
84 bridge {
85 label = "wb";
86 gpios = <&pio 16 GPIO_ACTIVE_LOW>;
87 linux,code = <BTN_1>;
88 linux,input-type = <EV_SW>;
89 };
90
91 /* GPIO 18 is a switch button with AUTO / MANUAL. */
92 manual {
93 label = "manual";
94 gpios = <&pio 18 GPIO_ACTIVE_LOW>;
95 linux,code = <BTN_2>;
96 linux,input-type = <EV_SW>;
97 };
98
99 wps {
100 label = "wps";
101 gpios = <&pio 102 GPIO_ACTIVE_LOW>;
102 linux,code = <KEY_WPS_BUTTON>;
103 };
104 };
105
106 rtkgsw: rtkgsw@0 {
107 compatible = "mediatek,rtk-gsw";
108 mediatek,ethsys = <&ethsys>;
109 mediatek,mdio = <&mdio>;
110 mediatek,reset-pin = <&pio 54 GPIO_ACTIVE_HIGH>;
111 };
112 };
113
114 &cpu0 {
115 proc-supply = <&mt6380_vcpu_reg>;
116 sram-supply = <&mt6380_vm_reg>;
117 };
118
119 &cpu1 {
120 proc-supply = <&mt6380_vcpu_reg>;
121 sram-supply = <&mt6380_vm_reg>;
122 };
123
124 &pcie0 {
125 pinctrl-names = "default";
126 pinctrl-0 = <&pcie0_pins>;
127 status = "okay";
128 };
129
130 &slot0 {
131 status = "okay";
132
133 wifi@0,0 {
134 compatible = "mediatek,mt76";
135 reg = <0x0000 0 0 0 0>;
136 mediatek,mtd-eeprom = <&factory 0x5000>;
137 ieee80211-freq-limit = <5000000 6000000>;
138 };
139 };
140
141 &pio {
142 eth_pins: eth-pins {
143 mux {
144 function = "eth";
145 groups = "mdc_mdio", "rgmii_via_gmac2";
146 };
147 };
148
149 /* Parallel nand is shared pin with eMMC */
150 parallel_nand_pins: parallel-nand-pins {
151 mux {
152 function = "flash";
153 groups = "par_nand";
154 };
155
156 conf-cmd-dat {
157 pins = "NCEB", "NWEB", "NREB",
158 "NDL4", "NDL5", "NDL6",
159 "NDL7", "NRB", "NCLE",
160 "NALE", "NDL0", "NDL1",
161 "NDL2", "NDL3";
162 input-enable;
163 drive-strength = <8>;
164 bias-pull-up;
165 };
166 };
167
168 pcie0_pins: pcie0-pins {
169 mux {
170 function = "pcie";
171 groups = "pcie0_pad_perst",
172 "pcie0_1_waken",
173 "pcie0_1_clkreq";
174 };
175 };
176
177 pmic_bus_pins: pmic-bus-pins {
178 mux {
179 function = "pmic";
180 groups = "pmic_bus";
181 };
182 };
183
184 pwm7_pins: pwm1-2-pins {
185 mux {
186 function = "pwm";
187 groups = "pwm_ch7_2";
188 };
189 };
190
191 uart0_pins: uart0-pins {
192 mux {
193 function = "uart";
194 groups = "uart0_0_tx_rx" ;
195 };
196 };
197
198 watchdog_pins: watchdog-pins {
199 mux {
200 function = "watchdog";
201 groups = "watchdog";
202 };
203 };
204 };
205
206 &bch {
207 status = "okay";
208 };
209
210 &eth {
211 pinctrl-names = "default";
212 pinctrl-0 = <&eth_pins>;
213 status = "okay";
214
215 gmac0: mac@0 {
216 compatible = "mediatek,eth-mac";
217 reg = <0>;
218
219 phy-connection-type = "2500base-x";
220
221 nvmem-cells = <&macaddr_factory_4>;
222 nvmem-cell-names = "mac-address";
223 mac-address-increment = <(-1)>;
224
225 fixed-link {
226 speed = <2500>;
227 full-duplex;
228 pause;
229 };
230 };
231
232 mdio: mdio-bus {
233 #address-cells = <1>;
234 #size-cells = <0>;
235 };
236 };
237
238 &nandc {
239 pinctrl-names = "default";
240 pinctrl-0 = <&parallel_nand_pins>;
241 status = "okay";
242
243 nand@0 {
244 reg = <0>;
245 nand-ecc-mode = "hw";
246
247 partitions {
248 compatible = "fixed-partitions";
249 #address-cells = <1>;
250 #size-cells = <1>;
251
252 partition@0 {
253 label = "Preloader";
254 reg = <0x0 0x80000>;
255 read-only;
256 };
257
258 partition@80000 {
259 label = "ATF";
260 reg = <0x80000 0x40000>;
261 read-only;
262 };
263
264 partition@c0000 {
265 label = "Bootloader";
266 reg = <0xc0000 0x80000>;
267 read-only;
268 };
269
270 partition@140000 {
271 label = "Config";
272 reg = <0x140000 0x80000>;
273 };
274
275 factory: partition@1c0000 {
276 label = "factory";
277 reg = <0x1c0000 0x40000>;
278 read-only;
279 };
280
281 partition@200000 {
282 compatible = "brcm,trx";
283 brcm,trx-magic = <0x32504844>;
284 label = "firmware";
285 reg = <0x200000 0x3a00000>;
286 };
287
288 partition@3C00000 {
289 label = "Kernel2";
290 reg = <0x3c00000 0x3a00000>;
291 };
292
293 partition@7600000 {
294 label = "glbcfg";
295 reg = <0x7600000 0x200000>;
296 read-only;
297 };
298
299 partition@7800000 {
300 label = "board_data";
301 reg = <0x7800000 0x200000>;
302 read-only;
303 };
304 };
305 };
306 };
307
308 &pwm {
309 pinctrl-names = "default";
310 pinctrl-0 = <&pwm7_pins>;
311 status = "okay";
312 };
313
314 &pwrap {
315 pinctrl-names = "default";
316 pinctrl-0 = <&pmic_bus_pins>;
317 status = "okay";
318 };
319
320 &uart0 {
321 pinctrl-names = "default";
322 pinctrl-0 = <&uart0_pins>;
323 status = "okay";
324 };
325
326 &watchdog {
327 pinctrl-names = "default";
328 pinctrl-0 = <&watchdog_pins>;
329 status = "okay";
330 };
331
332 &wmac {
333 status = "okay";
334
335 mediatek,mtd-eeprom = <&factory 0x0>;
336 };
337
338 &rtc {
339 status = "disabled";
340 };
341
342 &factory {
343 compatible = "nvmem-cells";
344 #address-cells = <1>;
345 #size-cells = <1>;
346
347 macaddr_factory_4: macaddr@4 {
348 reg = <0x4 0x6>;
349 };
350 };