target/linux/layerscape/patches-5.4/818-thermal-0004-thermal-qoriq-Update-the-settings-for-TMUv2.patch

   1 From da5a7765a20d34508036ba8ed1db87e546abcf4b Mon Sep 17 00:00:00 2001
   2 From: Yuantian Tang <andy.tang@nxp.com>
   3 Date: Mon, 25 May 2020 17:33:22 +0800
   4 Subject: [PATCH] thermal: qoriq: Update the settings for TMUv2
   5
   6 For TMU v2, TMSAR registers need to be set properly to get the
   7 accurate temperature values.
   8 Also the temperature read needs to be converted to degree Celsius
   9 since it is in degrees Kelvin.
  10
  11 Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
  12 ---
  13  drivers/thermal/qoriq_thermal.c | 21 +++++++++++++++++++--
  14  1 file changed, 19 insertions(+), 2 deletions(-)
  15
  16 --- a/drivers/thermal/qoriq_thermal.c
  17 +++ b/drivers/thermal/qoriq_thermal.c
  18 @@ -23,6 +23,7 @@
  19  #define TMTMIR_DEFAULT 0x0000000f
  20  #define TIER_DISABLE   0x0
  21  #define TEUMR0_V2              0x51009c00
  22 +#define TMSARA_V2              0xe
  23  #define TMU_VER1               0x1
  24  #define TMU_VER2               0x2
  25
  26 @@ -35,6 +36,13 @@ struct qoriq_tmu_site_regs {
  27         u8 res0[0x8];
  28  };
  29
  30 +struct qoriq_tmu_tmsar {
  31 +       u32 res0;
  32 +       u32 tmsar;
  33 +       u32 res1;
  34 +       u32 res2;
  35 +};
  36 +
  37  struct qoriq_tmu_regs_v1 {
  38         u32 tmr;                /* Mode Register */
  39         u32 tsr;                /* Status Register */
  40 @@ -95,7 +103,9 @@ struct qoriq_tmu_regs_v2 {
  41         u32 tscfgr;     /* Sensor Configuration Register */
  42         u8 res6[0x78];
  43         struct qoriq_tmu_site_regs site[SITES_MAX];
  44 -       u8 res7[0x9f8];
  45 +       u8 res10[0x100];
  46 +       struct qoriq_tmu_tmsar tmsar[16];
  47 +       u8 res7[0x7f8];
  48         u32 ipbrr0;             /* IP Block Revision Register 0 */
  49         u32 ipbrr1;             /* IP Block Revision Register 1 */
  50         u8 res8[0x300];
  51 @@ -158,7 +168,10 @@ static int tmu_get_temp(void *p, int *te
  52         u32 val;
  53
  54         val = tmu_read(qdata, &qdata->regs->site[qsensor->id].tritsr);
  55 -       *temp = (val & 0xff) * 1000;
  56 +       if (qdata->ver == TMU_VER1)
  57 +               *temp = (val & 0xff) * 1000;
  58 +       else
  59 +               *temp = (val & 0x1ff) * 1000 - 273150;
  60
  61         return 0;
  62  }
  63 @@ -319,6 +332,8 @@ static int qoriq_tmu_calibration(struct
  64
  65  static void qoriq_tmu_init_device(struct qoriq_tmu_data *data)
  66  {
  67 +       int i;
  68 +
  69         /* Disable interrupt, using polling instead */
  70         tmu_write(data, TIER_DISABLE, &data->regs->tier);
  71
  72 @@ -328,6 +343,8 @@ static void qoriq_tmu_init_device(struct
  73         } else {
  74                 tmu_write(data, TMTMIR_DEFAULT, &data->regs_v2->tmtmir);
  75                 tmu_write(data, TEUMR0_V2, &data->regs_v2->teumr0);
  76 +               for (i = 0; i < 7; i++)
  77 +                       tmu_write(data, TMSARA_V2, &data->regs_v2->tmsar[i].tmsar);
  78         }
  79
  80         /* Disable monitoring */