target/linux/lantiq/patches-3.2/0027-MIPS-lantiq-convert-falcon-to-clkdev-api.patch

   1 From 07c4da1cf419022e5874c881511f051bb81e984e Mon Sep 17 00:00:00 2001
   2 From: John Crispin <blogic@openwrt.org>
   3 Date: Thu, 8 Mar 2012 11:19:11 +0100
   4 Subject: [PATCH 27/70] MIPS: lantiq: convert falcon to clkdev api
   5
   6 Unify sysctrl/clock code and add clkdev hooks to sysctrl.c
   7
   8 Signed-off-by: John Crispin <blogic@openwrt.org>
   9 ---
  10  .../include/asm/mach-lantiq/falcon/lantiq_soc.h    |    8 +-
  11  arch/mips/lantiq/falcon/Makefile                   |    2 +-
  12  arch/mips/lantiq/falcon/sysctrl.c                  |  129 ++++++++++++--------
  13  3 files changed, 80 insertions(+), 59 deletions(-)
  14
  15 --- a/arch/mips/include/asm/mach-lantiq/falcon/lantiq_soc.h
  16 +++ b/arch/mips/include/asm/mach-lantiq/falcon/lantiq_soc.h
  17 @@ -95,6 +95,7 @@
  18
  19  /* Activation Status Register */
  20  #define ACTS_ASC1_ACT  0x00000800
  21 +#define ACTS_I2C_ACT   0x00004000
  22  #define ACTS_P0                0x00010000
  23  #define ACTS_P1                0x00010000
  24  #define ACTS_P2                0x00020000
  25 @@ -106,13 +107,6 @@
  26  #define ACTS_PADCTRL3  0x00200000
  27  #define ACTS_PADCTRL4  0x00400000
  28
  29 -extern void ltq_sysctl_activate(int module, unsigned int mask);
  30 -extern void ltq_sysctl_deactivate(int module, unsigned int mask);
  31 -extern void ltq_sysctl_clken(int module, unsigned int mask);
  32 -extern void ltq_sysctl_clkdis(int module, unsigned int mask);
  33 -extern void ltq_sysctl_reboot(int module, unsigned int mask);
  34 -extern int ltq_gpe_is_activated(unsigned int mask);
  35 -
  36  /* global register ranges */
  37  extern __iomem void *ltq_ebu_membase;
  38  extern __iomem void *ltq_sys1_membase;
  39 --- a/arch/mips/lantiq/falcon/Makefile
  40 +++ b/arch/mips/lantiq/falcon/Makefile
  41 @@ -1,2 +1,2 @@
  42 -obj-y := clk.o prom.o reset.o sysctrl.o devices.o gpio.o
  43 +obj-y := prom.o reset.o sysctrl.o devices.o gpio.o
  44  obj-$(CONFIG_LANTIQ_MACH_EASY98000) += mach-easy98000.o
  45 --- a/arch/mips/lantiq/falcon/sysctrl.c
  46 +++ b/arch/mips/lantiq/falcon/sysctrl.c
  47 @@ -9,11 +9,13 @@
  48
  49  #include <linux/ioport.h>
  50  #include <linux/export.h>
  51 +#include <linux/clkdev.h>
  52  #include <asm/delay.h>
  53
  54  #include <lantiq_soc.h>
  55
  56  #include "devices.h"
  57 +#include "../clk.h"
  58
  59  /* infrastructure control register */
  60  #define SYS1_INFRAC            0x00bc
  61 @@ -38,6 +40,10 @@
  62  #define LTQ_SYSCTL_DEACT       0x0028
  63  /* reboot Register */
  64  #define LTQ_SYSCTL_RBT         0x002c
  65 +/* CPU0 Clock Control Register */
  66 +#define LTQ_SYS1_CPU0CC         0x0040
  67 +/* clock divider bit */
  68 +#define LTQ_CPU0CC_CPUDIV       0x0001
  69
  70  static struct resource ltq_sysctl_res[] = {
  71         MEM_RES("sys1", LTQ_SYS1_BASE_ADDR, LTQ_SYS1_SIZE),
  72 @@ -64,79 +70,67 @@ void __iomem *ltq_ebu_membase;
  73  #define ltq_status_r32(x)      ltq_r32(ltq_status_membase + (x))
  74
  75  static inline void
  76 -ltq_sysctl_wait(int module, unsigned int mask,
  77 +ltq_sysctl_wait(struct clk *clk,
  78                 unsigned int test, unsigned int reg)
  79  {
  80         int err = 1000000;
  81
  82 -       do {} while (--err && ((ltq_reg_r32(module, reg)
  83 -                                       & mask) != test));
  84 +       do {} while (--err && ((ltq_reg_r32(clk->module, reg)
  85 +                                       & clk->bits) != test));
  86         if (!err)
  87 -               pr_err("module de/activation failed %d %08X %08X\n",
  88 -                                                       module, mask, test);
  89 +               pr_err("module de/activation failed %d %08X %08X %08X\n",
  90 +                               clk->module, clk->bits, test,
  91 +                               ltq_reg_r32(clk->module, reg) & clk->bits);
  92  }
  93
  94 -void
  95 -ltq_sysctl_activate(int module, unsigned int mask)
  96 -{
  97 -       if (module > SYSCTL_SYSGPE)
  98 -               return;
  99 -
 100 -       ltq_reg_w32(module, mask, LTQ_SYSCTL_CLKEN);
 101 -       ltq_reg_w32(module, mask, LTQ_SYSCTL_ACT);
 102 -       ltq_sysctl_wait(module, mask, mask, LTQ_SYSCTL_ACTS);
 103 +static int
 104 +ltq_sysctl_activate(struct clk *clk)
 105 +{
 106 +       ltq_reg_w32(clk->module, clk->bits, LTQ_SYSCTL_CLKEN);
 107 +       ltq_reg_w32(clk->module, clk->bits, LTQ_SYSCTL_ACT);
 108 +       ltq_sysctl_wait(clk, clk->bits, LTQ_SYSCTL_ACTS);
 109 +       return 0;
 110  }
 111 -EXPORT_SYMBOL(ltq_sysctl_activate);
 112
 113 -void
 114 -ltq_sysctl_deactivate(int module, unsigned int mask)
 115 +static void
 116 +ltq_sysctl_deactivate(struct clk *clk)
 117  {
 118 -       if (module > SYSCTL_SYSGPE)
 119 -               return;
 120 -
 121 -       ltq_reg_w32(module, mask, LTQ_SYSCTL_CLKCLR);
 122 -       ltq_reg_w32(module, mask, LTQ_SYSCTL_DEACT);
 123 -       ltq_sysctl_wait(module, mask, 0, LTQ_SYSCTL_ACTS);
 124 +       ltq_reg_w32(clk->module, clk->bits, LTQ_SYSCTL_CLKCLR);
 125 +       ltq_reg_w32(clk->module, clk->bits, LTQ_SYSCTL_DEACT);
 126 +       ltq_sysctl_wait(clk, 0, LTQ_SYSCTL_ACTS);
 127  }
 128 -EXPORT_SYMBOL(ltq_sysctl_deactivate);
 129
 130 -void
 131 -ltq_sysctl_clken(int module, unsigned int mask)
 132 +static int
 133 +ltq_sysctl_clken(struct clk *clk)
 134  {
 135 -       if (module > SYSCTL_SYSGPE)
 136 -               return;
 137 -
 138 -       ltq_reg_w32(module, mask, LTQ_SYSCTL_CLKEN);
 139 -       ltq_sysctl_wait(module, mask, mask, LTQ_SYSCTL_CLKS);
 140 +       ltq_reg_w32(clk->module, clk->bits, LTQ_SYSCTL_CLKEN);
 141 +       ltq_sysctl_wait(clk, clk->bits, LTQ_SYSCTL_CLKS);
 142 +       return 0;
 143  }
 144 -EXPORT_SYMBOL(ltq_sysctl_clken);
 145
 146 -void
 147 -ltq_sysctl_clkdis(int module, unsigned int mask)
 148 +static void
 149 +ltq_sysctl_clkdis(struct clk *clk)
 150  {
 151 -       if (module > SYSCTL_SYSGPE)
 152 -               return;
 153 -
 154 -       ltq_reg_w32(module, mask, LTQ_SYSCTL_CLKCLR);
 155 -       ltq_sysctl_wait(module, mask, 0, LTQ_SYSCTL_CLKS);
 156 +       ltq_reg_w32(clk->module, clk->bits, LTQ_SYSCTL_CLKCLR);
 157 +       ltq_sysctl_wait(clk, 0, LTQ_SYSCTL_CLKS);
 158  }
 159 -EXPORT_SYMBOL(ltq_sysctl_clkdis);
 160
 161 -void
 162 -ltq_sysctl_reboot(int module, unsigned int mask)
 163 +static void
 164 +ltq_sysctl_reboot(struct clk *clk)
 165  {
 166         unsigned int act;
 167 +       unsigned int bits;
 168
 169 -       if (module > SYSCTL_SYSGPE)
 170 -               return;
 171 -
 172 -       act = ltq_reg_r32(module, LTQ_SYSCTL_ACT);
 173 -       if ((~act & mask) != 0)
 174 -               ltq_sysctl_activate(module, ~act & mask);
 175 -       ltq_reg_w32(module, act & mask, LTQ_SYSCTL_RBT);
 176 -       ltq_sysctl_wait(module, mask, mask, LTQ_SYSCTL_ACTS);
 177 +       act = ltq_reg_r32(clk->module, LTQ_SYSCTL_ACT);
 178 +       bits = ~act & clk->bits;
 179 +       if (bits != 0) {
 180 +               ltq_reg_w32(clk->module, bits, LTQ_SYSCTL_CLKEN);
 181 +               ltq_reg_w32(clk->module, bits, LTQ_SYSCTL_ACT);
 182 +               ltq_sysctl_wait(clk, bits, LTQ_SYSCTL_ACTS);
 183 +       }
 184 +       ltq_reg_w32(clk->module, act & clk->bits, LTQ_SYSCTL_RBT);
 185 +       ltq_sysctl_wait(clk, clk->bits, LTQ_SYSCTL_ACTS);
 186  }
 187 -EXPORT_SYMBOL(ltq_sysctl_reboot);
 188
 189  /* enable the ONU core */
 190  static void
 191 @@ -167,6 +161,24 @@ ltq_gpe_enable(void)
 192         udelay(1);
 193  }
 194
 195 +static inline void
 196 +clkdev_add_sys(const char *dev, unsigned int module,
 197 +                               unsigned int bits)
 198 +{
 199 +       struct clk *clk = kzalloc(sizeof(struct clk), GFP_KERNEL);
 200 +
 201 +       clk->cl.dev_id = dev;
 202 +       clk->cl.con_id = NULL;
 203 +       clk->cl.clk = clk;
 204 +       clk->module = module;
 205 +       clk->activate = ltq_sysctl_activate;
 206 +       clk->deactivate = ltq_sysctl_deactivate;
 207 +       clk->enable = ltq_sysctl_clken;
 208 +       clk->disable = ltq_sysctl_clkdis;
 209 +       clk->reboot = ltq_sysctl_reboot;
 210 +       clkdev_add(&clk->cl);
 211 +}
 212 +
 213  void __init
 214  ltq_soc_init(void)
 215  {
 216 @@ -180,4 +192,19 @@ ltq_soc_init(void)
 217         ltq_ebu_membase = ltq_remap_resource(&ltq_ebu_res);
 218
 219         ltq_gpe_enable();
 220 +
 221 +       /* get our 3 static rates for cpu, fpi and io clocks */
 222 +       if (ltq_sys1_r32(LTQ_SYS1_CPU0CC) & LTQ_CPU0CC_CPUDIV)
 223 +               clkdev_add_static(CLOCK_200M, CLOCK_100M, CLOCK_200M);
 224 +       else
 225 +               clkdev_add_static(CLOCK_400M, CLOCK_100M, CLOCK_200M);
 226 +
 227 +       /* add our clock domains */
 228 +       clkdev_add_sys("falcon_gpio.0", SYSCTL_SYSETH, ACTS_PADCTRL0 | ACTS_P0);
 229 +       clkdev_add_sys("falcon_gpio.1", SYSCTL_SYS1, ACTS_PADCTRL1 | ACTS_P1);
 230 +       clkdev_add_sys("falcon_gpio.2", SYSCTL_SYSETH, ACTS_PADCTRL2 | ACTS_P2);
 231 +       clkdev_add_sys("falcon_gpio.3", SYSCTL_SYS1, ACTS_PADCTRL3 | ACTS_P3);
 232 +       clkdev_add_sys("falcon_gpio.4", SYSCTL_SYS1, ACTS_PADCTRL4 | ACTS_P4);
 233 +       clkdev_add_sys("ltq_asc.1", SYSCTL_SYS1, ACTS_ASC1_ACT);
 234 +       clkdev_add_sys("falcon_i2c", SYSCTL_SYS1, ACTS_I2C_ACT);
 235  }