lantiq: unify Fritz!Box LED mappings
[openwrt/staging/jogo.git] / target / linux / lantiq / files / arch / mips / boot / dts / FRITZ736X.dtsi
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 /dts-v1/;
3
4 #include "vr9.dtsi"
5
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/mips/lantiq_rcu_gphy.h>
8
9 / {
10 compatible = "avm,fritz736x", "lantiq,xway", "lantiq,vr9";
11
12 chosen {
13 bootargs = "console=ttyLTQ0,115200";
14 };
15
16 aliases {
17 led-boot = &power_green;
18 led-failsafe = &power_red;
19 led-running = &power_green;
20 led-upgrade = &power_red;
21
22 led-dsl = &info_green;
23 led-wifi = &wifi;
24 };
25
26 memory@0 {
27 device_type = "memory";
28 reg = <0x0 0x8000000>;
29 };
30
31 keys {
32 compatible = "gpio-keys-polled";
33 poll-interval = <100>;
34
35 dect {
36 label = "dect";
37 gpios = <&gpio 1 GPIO_ACTIVE_HIGH>;
38 linux,code = <KEY_PHONE>;
39 };
40
41 wifi {
42 label = "wifi";
43 gpios = <&gpio 29 GPIO_ACTIVE_HIGH>;
44 linux,code = <KEY_WLAN>;
45 };
46 };
47
48 leds: leds {
49 compatible = "gpio-leds";
50
51 power_green: power {
52 gpios = <&gpio 32 GPIO_ACTIVE_LOW>;
53 default-state = "keep";
54 };
55
56 power_red: power2 {
57 gpios = <&gpio 33 GPIO_ACTIVE_LOW>;
58 };
59
60 info_green: info_green {
61 gpios = <&gpio 47 GPIO_ACTIVE_LOW>;
62 };
63
64 wifi: wifi {
65 gpios = <&gpio 36 GPIO_ACTIVE_LOW>;
66 };
67
68 info_red: info_red {
69 gpios = <&gpio 34 GPIO_ACTIVE_LOW>;
70 };
71
72 dect: dect {
73 gpios = <&gpio 35 GPIO_ACTIVE_LOW>;
74 };
75 };
76 };
77
78 &eth0 {
79 lan: interface@0 {
80 compatible = "lantiq,xrx200-pdi";
81 #address-cells = <1>;
82 #size-cells = <0>;
83 reg = <0>;
84 mtd-mac-address = <&urlader 0xa91>;
85 mtd-mac-address-increment = <(-2)>;
86 lantiq,switch;
87
88 ethernet@0 {
89 compatible = "lantiq,xrx200-pdi-port";
90 reg = <0>;
91 phy-mode = "rmii";
92 phy-handle = <&phy0>;
93 };
94
95 ethernet@1 {
96 compatible = "lantiq,xrx200-pdi-port";
97 reg = <1>;
98 phy-mode = "rmii";
99 phy-handle = <&phy1>;
100 };
101
102 ethernet@2 {
103 compatible = "lantiq,xrx200-pdi-port";
104 reg = <2>;
105 phy-mode = "gmii";
106 phy-handle = <&phy11>;
107 };
108
109 ethernet@3 {
110 compatible = "lantiq,xrx200-pdi-port";
111 reg = <4>;
112 phy-mode = "gmii";
113 phy-handle = <&phy13>;
114 };
115 };
116
117 mdio {
118 #address-cells = <1>;
119 #size-cells = <0>;
120 compatible = "lantiq,xrx200-mdio";
121
122 phy0: ethernet-phy@0 {
123 reg = <0x00>;
124 compatible = "ethernet-phy-ieee802.3-c22";
125 reset-gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
126 };
127
128 phy1: ethernet-phy@1 {
129 reg = <0x01>;
130 compatible = "ethernet-phy-ieee802.3-c22";
131 reset-gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
132 };
133
134 phy11: ethernet-phy@11 {
135 reg = <0x11>;
136 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
137 };
138
139 phy13: ethernet-phy@13 {
140 reg = <0x13>;
141 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
142 };
143 };
144 };
145
146 &gphy0 {
147 lantiq,gphy-mode = <GPHY_MODE_GE>;
148 };
149
150 &gphy1 {
151 lantiq,gphy-mode = <GPHY_MODE_GE>;
152 };
153
154 &gpio {
155 pinctrl-names = "default";
156 pinctrl-0 = <&state_default>;
157
158 state_default: pinmux {
159 mdio {
160 lantiq,groups = "mdio";
161 lantiq,function = "mdio";
162 };
163
164 phy-rst {
165 lantiq,pins = "io37", "io44";
166 lantiq,pull = <0>;
167 lantiq,open-drain;
168 lantiq,output = <1>;
169 };
170 };
171
172 };
173
174 &pcie0 {
175 status = "okay";
176
177 pcie@0 {
178 reg = <0 0 0 0 0>;
179 #interrupt-cells = <1>;
180 #size-cells = <1>;
181 #address-cells = <2>;
182 device_type = "pci";
183
184 wifi@168c,002e {
185 compatible = "pci168c,002e";
186 reg = <0 0 0 0 0>;
187 qca,no-eeprom; /* load from ath9k-eeprom-pci-0000:01:00.0.bin */
188 };
189 };
190 };
191
192 &usb_phy0 {
193 status = "okay";
194 };
195
196 &usb_phy1 {
197 status = "okay";
198 };
199
200 &usb0 {
201 status = "okay";
202 };
203
204 &usb1 {
205 status = "okay";
206 };