bdd759687a302af80281f4c61cce2c4e7b377c81
[openwrt/staging/stintel.git] / target / linux / lantiq / dts / EASY80920.dtsi
1 /include/ "vr9.dtsi"
2
3 / {
4 chosen {
5 bootargs = "console=ttyLTQ0,115200 init=/etc/preinit";
6
7 leds {
8 power = &power;
9 usb = &usb1;
10 usb2 = &usb2;
11 };
12 };
13
14 memory@0 {
15 reg = <0x0 0x4000000>;
16 };
17
18 fpi@10000000 {
19 #address-cells = <1>;
20 #size-cells = <1>;
21 compatible = "lantiq,fpi", "simple-bus";
22 ranges = <0x0 0x10000000 0xEEFFFFF>;
23 reg = <0x10000000 0xEF00000>;
24
25 localbus@0 {
26 #address-cells = <2>;
27 #size-cells = <1>;
28 compatible = "lantiq,localbus", "simple-bus";
29
30 };
31
32 spi@E100800 {
33 compatible = "lantiq,spi-xway-broken";
34 reg = <0xE100800 0x100>;
35 interrupt-parent = <&icu0>;
36 interrupts = <22 23 24>;
37 #address-cells = <1>;
38 #size-cells = <1>;
39
40 m25p80@0 {
41 #address-cells = <1>;
42 #size-cells = <1>;
43 compatible = "jedec,spi-nor";
44 reg = <0 0>;
45 spi-max-frequency = <1000000>;
46
47 partition@0 {
48 reg = <0x0 0x20000>;
49 label = "SPI (RO) U-Boot Image";
50 read-only;
51 };
52
53 partition@20000 {
54 reg = <0x20000 0x10000>;
55 label = "ENV_MAC";
56 read-only;
57 };
58
59 partition@30000 {
60 reg = <0x30000 0x10000>;
61 label = "DPF";
62 read-only;
63 };
64
65 partition@40000 {
66 reg = <0x40000 0x10000>;
67 label = "NVRAM";
68 read-only;
69 };
70
71 partition@500000 {
72 reg = <0x50000 0x003a0000>;
73 label = "kernel";
74 };
75 };
76 };
77
78 gpio: pinmux@E100B10 {
79 compatible = "lantiq,pinctrl-xr9";
80 pinctrl-names = "default";
81 pinctrl-0 = <&state_default>;
82
83 interrupt-parent = <&icu0>;
84 interrupts = <166 135 66 40 41 42 38>;
85
86 #gpio-cells = <2>;
87 gpio-controller;
88 reg = <0xE100B10 0xA0>;
89
90 state_default: pinmux {
91 exin3 {
92 lantiq,groups = "exin3";
93 lantiq,function = "exin";
94 };
95 stp {
96 lantiq,groups = "stp";
97 lantiq,function = "stp";
98 };
99 spi {
100 lantiq,groups = "spi", "spi_cs4";
101 lantiq,function = "spi";
102 };
103 nand {
104 lantiq,groups = "nand cle", "nand ale",
105 "nand rd", "nand rdy";
106 lantiq,function = "ebu";
107 };
108 mdio {
109 lantiq,groups = "mdio";
110 lantiq,function = "mdio";
111 };
112 pci {
113 lantiq,groups = "gnt1", "req1";
114 lantiq,function = "pci";
115 };
116 conf_out {
117 lantiq,pins = "io24", "io13", "io49", /* nand cle, ale and rd */
118 "io4", "io5", "io6", /* stp */
119 "io21",
120 "io33";
121 lantiq,open-drain;
122 lantiq,pull = <0>;
123 lantiq,output = <1>;
124 };
125 pcie-rst {
126 lantiq,pins = "io38";
127 lantiq,pull = <0>;
128 lantiq,output = <1>;
129 };
130 conf_in {
131 lantiq,pins = "io39", /* exin3 */
132 "io48"; /* nand rdy */
133 lantiq,pull = <2>;
134 };
135 };
136 };
137
138 eth@E108000 {
139 #address-cells = <1>;
140 #size-cells = <0>;
141 compatible = "lantiq,xrx200-net";
142 reg = < 0xE108000 0x3000 /* switch */
143 0xE10B100 0x70 /* mdio */
144 0xE10B1D8 0x30 /* mii */
145 0xE10B308 0x30 /* pmac */
146 >;
147 interrupt-parent = <&icu0>;
148 interrupts = <73 72>;
149
150 lan: interface@0 {
151 compatible = "lantiq,xrx200-pdi";
152 #address-cells = <1>;
153 #size-cells = <0>;
154 reg = <0>;
155 mac-address = [ 00 11 22 33 44 55 ];
156
157 ethernet@0 {
158 compatible = "lantiq,xrx200-pdi-port";
159 reg = <0>;
160 phy-mode = "rgmii";
161 phy-handle = <&phy0>;
162 };
163 ethernet@1 {
164 compatible = "lantiq,xrx200-pdi-port";
165 reg = <1>;
166 phy-mode = "rgmii";
167 phy-handle = <&phy1>;
168 };
169 ethernet@2 {
170 compatible = "lantiq,xrx200-pdi-port";
171 reg = <2>;
172 phy-mode = "gmii";
173 phy-handle = <&phy11>;
174 };
175 };
176
177 wan: interface@1 {
178 compatible = "lantiq,xrx200-pdi";
179 #address-cells = <1>;
180 #size-cells = <0>;
181 reg = <1>;
182 mac-address = [ 00 11 22 33 44 56 ];
183 lantiq,wan;
184 ethernet@5 {
185 compatible = "lantiq,xrx200-pdi-port";
186 reg = <5>;
187 phy-mode = "rgmii";
188 phy-handle = <&phy5>;
189 };
190 };
191
192 test: interface@2 {
193 compatible = "lantiq,xrx200-pdi";
194 #address-cells = <1>;
195 #size-cells = <0>;
196 reg = <2>;
197 mac-address = [ 00 11 22 33 44 57 ];
198 ethernet@4 {
199 compatible = "lantiq,xrx200-pdi-port";
200 reg = <4>;
201 phynmode0 = "gmii";
202 phy-handle = <&phy13>;
203 };
204 };
205
206 mdio@0 {
207 #address-cells = <1>;
208 #size-cells = <0>;
209 compatible = "lantiq,xrx200-mdio";
210 phy0: ethernet-phy@0 {
211 reg = <0x0>;
212 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
213 };
214 phy1: ethernet-phy@1 {
215 reg = <0x1>;
216 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
217 };
218 phy5: ethernet-phy@5 {
219 reg = <0x5>;
220 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
221 };
222 phy11: ethernet-phy@11 {
223 reg = <0x11>;
224 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
225 };
226 phy13: ethernet-phy@13 {
227 reg = <0x13>;
228 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
229 };
230 };
231 };
232
233 stp: stp@E100BB0 {
234 compatible = "lantiq,gpio-stp-xway";
235 reg = <0xE100BB0 0x40>;
236 #gpio-cells = <2>;
237 gpio-controller;
238
239 lantiq,shadow = <0xffff>;
240 lantiq,groups = <0x7>;
241 lantiq,dsl = <0x3>;
242 lantiq,phy1 = <0x7>;
243 lantiq,phy2 = <0x7>;
244 /* lantiq,rising; */
245 };
246
247 ifxhcd@E101000 {
248 status = "okay";
249 gpios = <&gpio 33 0>;
250 lantiq,portmask = <0x3>;
251 };
252
253 pci@E105400 {
254 #address-cells = <3>;
255 #size-cells = <2>;
256 #interrupt-cells = <1>;
257 compatible = "lantiq,pci-xway1";
258 bus-range = <0x0 0x0>;
259 ranges = <0x2000000 0 0x8000000 0x8000000 0 0x2000000 /* pci memory */
260 0x1000000 0 0x00000000 0xAE00000 0 0x200000>; /* io space */
261 reg = <0x7000000 0x8000 /* config space */
262 0xE105400 0x400>; /* pci bridge */
263 lantiq,bus-clock = <33333333>;
264 /*lantiq,external-clock;*/
265 lantiq,delay-hi = <0>; /* 0ns delay */
266 lantiq,delay-lo = <0>; /* 0.0ns delay */
267 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
268 interrupt-map = <
269 0x7000 0 0 1 &icu0 29 1 // slot 14, irq 29
270 >;
271 gpios-reset = <&gpio 21 0>;
272 req-mask = <0x1>; /* GNT1 */
273 };
274 };
275
276 gphy-xrx200 {
277 compatible = "lantiq,phy-xrx200";
278 firmware = "lantiq/vr9_phy11g_a2x.bin";
279 phys = [ 00 01 ];
280 };
281
282 gpio-keys-polled {
283 compatible = "gpio-keys-polled";
284 #address-cells = <1>;
285 #size-cells = <0>;
286 poll-interval = <100>;
287 /* reset {
288 label = "reset";
289 gpios = <&gpio 7 1>;
290 linux,code = <0x198>;
291 };*/
292 paging {
293 label = "paging";
294 gpios = <&gpio 11 1>;
295 linux,code = <0x100>;
296 };
297 };
298
299 gpio-leds {
300 compatible = "gpio-leds";
301
302 power: power {
303 label = "power";
304 gpios = <&stp 9 0>;
305 default-state = "on";
306 };
307 warning {
308 label = "warning";
309 gpios = <&stp 22 0>;
310 };
311 fxs1 {
312 label = "fxs1";
313 gpios = <&stp 21 0>;
314 };
315 fxs2 {
316 label = "fxs2";
317 gpios = <&stp 20 0>;
318 };
319 fxo {
320 label = "fxo";
321 gpios = <&stp 19 0>;
322 };
323 usb1: usb1 {
324 label = "usb1";
325 gpios = <&stp 18 0>;
326 };
327 usb2: usb2 {
328 label = "usb2";
329 gpios = <&stp 15 0>;
330 };
331 sd {
332 label = "sd";
333 gpios = <&stp 14 0>;
334 };
335 wps {
336 label = "wps";
337 gpios = <&stp 12 0>;
338 };
339 };
340 };