ipq806x: add GSBI1 node to DTSI
[openwrt/staging/yousong.git] / target / linux / ipq806x / patches-5.4 / 851-add-gsbi1-dts.patch
1 Index: linux-5.4.65/arch/arm/boot/dts/qcom-ipq8064.dtsi
2 ===================================================================
3 --- linux-5.4.65.orig/arch/arm/boot/dts/qcom-ipq8064.dtsi
4 +++ linux-5.4.65/arch/arm/boot/dts/qcom-ipq8064.dtsi
5 @@ -865,6 +865,41 @@
6 reg = <0x12100000 0x10000>;
7 };
8
9 + gsbi1: gsbi@12440000 {
10 + compatible = "qcom,gsbi-v1.0.0";
11 + cell-index = <1>;
12 + reg = <0x12440000 0x100>;
13 + clocks = <&gcc GSBI1_H_CLK>;
14 + clock-names = "iface";
15 + #address-cells = <1>;
16 + #size-cells = <1>;
17 + ranges;
18 + status = "disabled";
19 +
20 + syscon-tcsr = <&tcsr>;
21 +
22 + gsbi1_serial: serial@12450000 {
23 + compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
24 + reg = <0x12450000 0x100>,
25 + <0x12400000 0x03>;
26 + interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
27 + clocks = <&gcc GSBI1_UART_CLK>, <&gcc GSBI1_H_CLK>;
28 + clock-names = "core", "iface";
29 + status = "disabled";
30 + };
31 +
32 + gsbi1_i2c: i2c@12460000 {
33 + compatible = "qcom,i2c-qup-v1.1.1";
34 + reg = <0x12460000 0x1000>;
35 + interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>;
36 + clocks = <&gcc GSBI1_QUP_CLK>, <&gcc GSBI1_H_CLK>;
37 + clock-names = "core", "iface";
38 + #address-cells = <1>;
39 + #size-cells = <0>;
40 + status = "disabled";
41 + };
42 + };
43 +
44 gsbi2: gsbi@12480000 {
45 compatible = "qcom,gsbi-v1.0.0";
46 cell-index = <2>;