target/linux/ipq806x/patches-4.9/0026-dts-ipq4019-Add-support-for-IPQ4019-DK04-board.patch

   1 From ec3e465ecf3f7dd26f2e22170e4c5f4b9979df5d Mon Sep 17 00:00:00 2001
   2 From: Matthew McClintock <mmcclint@codeaurora.org>
   3 Date: Mon, 21 Mar 2016 15:55:21 -0500
   4 Subject: [PATCH 26/69] dts: ipq4019: Add support for IPQ4019 DK04 board
   5
   6 This is pretty similiar to a DK01 but has a bit more IO. Some notable
   7 differences are listed below however they are not in the device tree yet
   8 as we continue adding more support
   9
  10 - second serial port
  11 - PCIe
  12 - NAND
  13 - SD/EMMC
  14
  15 Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
  16 ---
  17  arch/arm/boot/dts/Makefile                      |   1 +
  18  arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi   |  12 +-
  19  arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1-c1.dts |  21 +++
  20  arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi   | 163 ++++++++++++++++++++++++
  21  4 files changed, 189 insertions(+), 8 deletions(-)
  22  create mode 100644 arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1-c1.dts
  23  create mode 100644 arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi
  24
  25 diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
  26 index 7037201c5e3a..6a18f87ffa4d 100644
  27 --- a/arch/arm/boot/dts/Makefile
  28 +++ b/arch/arm/boot/dts/Makefile
  29 @@ -617,6 +617,7 @@ dtb-$(CONFIG_ARCH_QCOM) += \
  30         qcom-apq8084-ifc6540.dtb \
  31         qcom-apq8084-mtp.dtb \
  32         qcom-ipq4019-ap.dk01.1-c1.dtb \
  33 +       qcom-ipq4019-ap.dk04.1-c1.dtb \
  34         qcom-ipq8064-ap148.dtb \
  35         qcom-msm8660-surf.dtb \
  36         qcom-msm8960-cdp.dtb \
  37 diff --git a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
  38 index 3ab61bc19b3b..99ee67af43e1 100644
  39 --- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
  40 +++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
  41 @@ -109,11 +109,7 @@
  42                         status = "ok";
  43                 };
  44
  45 -                usb3_ss_phy: ssphy@0 {
  46 -                        status = "ok";
  47 -                };
  48 -
  49 -                dummy_ss_phy: ssphy@1 {
  50 +                usb3_ss_phy: ssphy@9a000 {
  51                          status = "ok";
  52                  };
  53
  54 @@ -121,15 +117,15 @@
  55                          status = "ok";
  56                  };
  57
  58 -                usb2_hs_phy: hsphy@a8000 {
  59 +                usb3@0 {
  60                          status = "ok";
  61                  };
  62
  63 -                usb3: usb3@8a00000 {
  64 +                usb2_hs_phy: hsphy@a8000 {
  65                          status = "ok";
  66                  };
  67
  68 -                usb2: usb2@6000000 {
  69 +                usb2@0{
  70                          status = "ok";
  71                  };
  72         };
  73 diff --git a/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1-c1.dts b/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1-c1.dts
  74 new file mode 100644
  75 index 000000000000..47202d28fe6a
  76 --- /dev/null
  77 +++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1-c1.dts
  78 @@ -0,0 +1,21 @@
  79 +/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
  80 + *
  81 + * Permission to use, copy, modify, and/or distribute this software for any
  82 + * purpose with or without fee is hereby granted, provided that the above
  83 + * copyright notice and this permission notice appear in all copies.
  84 + *
  85 + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  86 + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  87 + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  88 + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  89 + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  90 + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  91 + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  92 + *
  93 + */
  94 +
  95 +#include "qcom-ipq4019-ap.dk04.1.dtsi"
  96 +
  97 +/ {
  98 +       model = "Qualcomm Technologies, Inc. IPQ40xx/AP-DK04.1-C1";
  99 +};
 100 diff --git a/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi b/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi
 101 new file mode 100644
 102 index 000000000000..c94b3e717f14
 103 --- /dev/null
 104 +++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi
 105 @@ -0,0 +1,163 @@
 106 +/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
 107 + *
 108 + * Permission to use, copy, modify, and/or distribute this software for any
 109 + * purpose with or without fee is hereby granted, provided that the above
 110 + * copyright notice and this permission notice appear in all copies.
 111 + *
 112 + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
 113 + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
 114 + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
 115 + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
 116 + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
 117 + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
 118 + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
 119 + *
 120 + */
 121 +
 122 +#include "qcom-ipq4019.dtsi"
 123 +
 124 +/ {
 125 +       model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK04.1";
 126 +       compatible = "qcom,ipq4019";
 127 +
 128 +       clocks {
 129 +                xo: xo {
 130 +                        compatible = "fixed-clock";
 131 +                        clock-frequency = <48000000>;
 132 +                        #clock-cells = <0>;
 133 +                };
 134 +       };
 135 +
 136 +       soc {
 137 +               timer {
 138 +                       compatible = "arm,armv7-timer";
 139 +                       interrupts = <1 2 0xf08>,
 140 +                                    <1 3 0xf08>,
 141 +                                    <1 4 0xf08>,
 142 +                                    <1 1 0xf08>;
 143 +                       clock-frequency = <48000000>;
 144 +               };
 145 +
 146 +               pinctrl@0x01000000 {
 147 +                       serial_0_pins: serial_pinmux {
 148 +                               mux {
 149 +                                       pins = "gpio16", "gpio17";
 150 +                                       function = "blsp_uart0";
 151 +                                       bias-disable;
 152 +                               };
 153 +                       };
 154 +
 155 +                        serial_1_pins: serial1_pinmux {
 156 +                                mux {
 157 +                                        pins = "gpio8", "gpio9";
 158 +                                        function = "blsp_uart1";
 159 +                                        bias-disable;
 160 +                                };
 161 +                        };
 162 +
 163 +                       spi_0_pins: spi_0_pinmux {
 164 +                               pinmux {
 165 +                                       function = "blsp_spi0";
 166 +                                       pins = "gpio13", "gpio14", "gpio15";
 167 +                               };
 168 +                               pinmux_cs {
 169 +                                       function = "gpio";
 170 +                                       pins = "gpio12";
 171 +                               };
 172 +                               pinconf {
 173 +                                       pins = "gpio13", "gpio14", "gpio15";
 174 +                                       drive-strength = <12>;
 175 +                                       bias-disable;
 176 +                               };
 177 +                               pinconf_cs {
 178 +                                       pins = "gpio12";
 179 +                                       drive-strength = <2>;
 180 +                                       bias-disable;
 181 +                                       output-high;
 182 +                               };
 183 +                       };
 184 +
 185 +                       i2c_0_pins: i2c_0_pinmux {
 186 +                               pinmux {
 187 +                                       function = "blsp_i2c0";
 188 +                                       pins = "gpio10", "gpio11";
 189 +                               };
 190 +                               pinconf {
 191 +                                       pins = "gpio10", "gpio11";
 192 +                                       drive-strength = <16>;
 193 +                                       bias-disable;
 194 +                               };
 195 +                       };
 196 +               };
 197 +
 198 +               blsp_dma: dma@7884000 {
 199 +                       status = "ok";
 200 +               };
 201 +
 202 +               spi_0: spi@78b5000 {
 203 +                       pinctrl-0 = <&spi_0_pins>;
 204 +                       pinctrl-names = "default";
 205 +                       status = "ok";
 206 +                       cs-gpios = <&tlmm 12 0>;
 207 +
 208 +                       mx25l25635e@0 {
 209 +                               #address-cells = <1>;
 210 +                               #size-cells = <1>;
 211 +                               reg = <0>;
 212 +                               compatible = "mx25l25635e";
 213 +                               spi-max-frequency = <24000000>;
 214 +                       };
 215 +               };
 216 +
 217 +                i2c_0: i2c@78b7000 { /* BLSP1 QUP2 */
 218 +                        pinctrl-0 = <&i2c_0_pins>;
 219 +                        pinctrl-names = "default";
 220 +
 221 +                       status = "ok";
 222 +                };
 223 +
 224 +               serial@78af000 {
 225 +                       pinctrl-0 = <&serial_0_pins>;
 226 +                       pinctrl-names = "default";
 227 +                       status = "ok";
 228 +               };
 229 +
 230 +                serial@78b0000 {
 231 +                        pinctrl-0 = <&serial_1_pins>;
 232 +                        pinctrl-names = "default";
 233 +                        status = "ok";
 234 +                };
 235 +
 236 +                usb3_ss_phy: ssphy@9a000 {
 237 +                        status = "ok";
 238 +                };
 239 +
 240 +                usb3_hs_phy: hsphy@a6000 {
 241 +                        status = "ok";
 242 +                };
 243 +
 244 +                usb3: usb3@0 {
 245 +                        status = "ok";
 246 +                };
 247 +
 248 +                usb2_hs_phy: hsphy@a8000 {
 249 +                        status = "ok";
 250 +                };
 251 +
 252 +                usb2: usb2@6000000 {
 253 +                        status = "ok";
 254 +                };
 255 +
 256 +               cryptobam: dma@8e04000 {
 257 +                       status = "ok";
 258 +               };
 259 +
 260 +               crypto@8e3a000 {
 261 +                       status = "ok";
 262 +               };
 263 +
 264 +               watchdog@b017000 {
 265 +                       status = "ok";
 266 +               };
 267 +       };
 268 +};
 269 --
 270 2.11.0
 271