ipq806x: refresh new and changed patches
[openwrt/staging/noltari.git] / target / linux / ipq806x / patches-4.19 / 0036-qcom-cpufreq-nvmem-Re-organise-kryo-cpufreq-driver.patch
1 From 7d12709544b8b3fb9727a34a664b8380e1e3493a Mon Sep 17 00:00:00 2001
2 From: Sricharan R <sricharan@codeaurora.org>
3 Date: Thu, 25 Jul 2019 12:41:31 +0200
4 Subject: [PATCH] cpufreq: qcom: Re-organise kryo cpufreq to use it for other
5 nvmem based qcom socs
6
7 The kryo cpufreq driver reads the nvmem cell and uses that data to
8 populate the opps. There are other qcom cpufreq socs like krait which
9 does similar thing. Except for the interpretation of the read data,
10 rest of the driver is same for both the cases. So pull the common things
11 out for reuse.
12
13 Signed-off-by: Sricharan R <sricharan@codeaurora.org>
14 [niklas.cassel@linaro.org: split dt-binding into a separate patch and
15 do not rename the compatible string. Update MAINTAINERS file.]
16 Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
17 Reviewed-by: Ilia Lin <ilia.lin@kernel.org>
18 Reviewed-by: Stephen Boyd <sboyd@kernel.org>
19 Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
20 ---
21 MAINTAINERS | 4 +-
22 drivers/cpufreq/Kconfig.arm | 4 +-
23 drivers/cpufreq/Makefile | 2 +-
24 ...om-cpufreq-kryo.c => qcom-cpufreq-nvmem.c} | 122 +++++++++++-------
25 4 files changed, 78 insertions(+), 54 deletions(-)
26 rename drivers/cpufreq/{qcom-cpufreq-kryo.c => qcom-cpufreq-nvmem.c} (69%)
27
28 --- a/drivers/cpufreq/Kconfig.arm
29 +++ b/drivers/cpufreq/Kconfig.arm
30 @@ -110,8 +110,8 @@ config ARM_OMAP2PLUS_CPUFREQ
31 depends on ARCH_OMAP2PLUS
32 default ARCH_OMAP2PLUS
33
34 -config ARM_QCOM_CPUFREQ_KRYO
35 - tristate "Qualcomm Kryo based CPUFreq"
36 +config ARM_QCOM_CPUFREQ_NVMEM
37 + tristate "Qualcomm nvmem based CPUFreq"
38 depends on ARM64
39 depends on QCOM_QFPROM
40 depends on QCOM_SMEM
41 --- a/drivers/cpufreq/Makefile
42 +++ b/drivers/cpufreq/Makefile
43 @@ -64,7 +64,7 @@ obj-$(CONFIG_MACH_MVEBU_V7) += mvebu-cp
44 obj-$(CONFIG_ARM_OMAP2PLUS_CPUFREQ) += omap-cpufreq.o
45 obj-$(CONFIG_ARM_PXA2xx_CPUFREQ) += pxa2xx-cpufreq.o
46 obj-$(CONFIG_PXA3xx) += pxa3xx-cpufreq.o
47 -obj-$(CONFIG_ARM_QCOM_CPUFREQ_KRYO) += qcom-cpufreq-kryo.o
48 +obj-$(CONFIG_ARM_QCOM_CPUFREQ_NVMEM) += qcom-cpufreq-nvmem.o
49 obj-$(CONFIG_ARM_S3C2410_CPUFREQ) += s3c2410-cpufreq.o
50 obj-$(CONFIG_ARM_S3C2412_CPUFREQ) += s3c2412-cpufreq.o
51 obj-$(CONFIG_ARM_S3C2416_CPUFREQ) += s3c2416-cpufreq.o
52 --- a/drivers/cpufreq/qcom-cpufreq-kryo.c
53 +++ /dev/null
54 @@ -1,249 +0,0 @@
55 -// SPDX-License-Identifier: GPL-2.0
56 -/*
57 - * Copyright (c) 2018, The Linux Foundation. All rights reserved.
58 - */
59 -
60 -/*
61 - * In Certain QCOM SoCs like apq8096 and msm8996 that have KRYO processors,
62 - * the CPU frequency subset and voltage value of each OPP varies
63 - * based on the silicon variant in use. Qualcomm Process Voltage Scaling Tables
64 - * defines the voltage and frequency value based on the msm-id in SMEM
65 - * and speedbin blown in the efuse combination.
66 - * The qcom-cpufreq-kryo driver reads the msm-id and efuse value from the SoC
67 - * to provide the OPP framework with required information.
68 - * This is used to determine the voltage and frequency value for each OPP of
69 - * operating-points-v2 table when it is parsed by the OPP framework.
70 - */
71 -
72 -#include <linux/cpu.h>
73 -#include <linux/err.h>
74 -#include <linux/init.h>
75 -#include <linux/kernel.h>
76 -#include <linux/module.h>
77 -#include <linux/nvmem-consumer.h>
78 -#include <linux/of.h>
79 -#include <linux/platform_device.h>
80 -#include <linux/pm_opp.h>
81 -#include <linux/slab.h>
82 -#include <linux/soc/qcom/smem.h>
83 -
84 -#define MSM_ID_SMEM 137
85 -
86 -enum _msm_id {
87 - MSM8996V3 = 0xF6ul,
88 - APQ8096V3 = 0x123ul,
89 - MSM8996SG = 0x131ul,
90 - APQ8096SG = 0x138ul,
91 -};
92 -
93 -enum _msm8996_version {
94 - MSM8996_V3,
95 - MSM8996_SG,
96 - NUM_OF_MSM8996_VERSIONS,
97 -};
98 -
99 -static struct platform_device *cpufreq_dt_pdev, *kryo_cpufreq_pdev;
100 -
101 -static enum _msm8996_version qcom_cpufreq_kryo_get_msm_id(void)
102 -{
103 - size_t len;
104 - u32 *msm_id;
105 - enum _msm8996_version version;
106 -
107 - msm_id = qcom_smem_get(QCOM_SMEM_HOST_ANY, MSM_ID_SMEM, &len);
108 - if (IS_ERR(msm_id))
109 - return NUM_OF_MSM8996_VERSIONS;
110 -
111 - /* The first 4 bytes are format, next to them is the actual msm-id */
112 - msm_id++;
113 -
114 - switch ((enum _msm_id)*msm_id) {
115 - case MSM8996V3:
116 - case APQ8096V3:
117 - version = MSM8996_V3;
118 - break;
119 - case MSM8996SG:
120 - case APQ8096SG:
121 - version = MSM8996_SG;
122 - break;
123 - default:
124 - version = NUM_OF_MSM8996_VERSIONS;
125 - }
126 -
127 - return version;
128 -}
129 -
130 -static int qcom_cpufreq_kryo_probe(struct platform_device *pdev)
131 -{
132 - struct opp_table **opp_tables;
133 - enum _msm8996_version msm8996_version;
134 - struct nvmem_cell *speedbin_nvmem;
135 - struct device_node *np;
136 - struct device *cpu_dev;
137 - unsigned cpu;
138 - u8 *speedbin;
139 - u32 versions;
140 - size_t len;
141 - int ret;
142 -
143 - cpu_dev = get_cpu_device(0);
144 - if (!cpu_dev)
145 - return -ENODEV;
146 -
147 - msm8996_version = qcom_cpufreq_kryo_get_msm_id();
148 - if (NUM_OF_MSM8996_VERSIONS == msm8996_version) {
149 - dev_err(cpu_dev, "Not Snapdragon 820/821!");
150 - return -ENODEV;
151 - }
152 -
153 - np = dev_pm_opp_of_get_opp_desc_node(cpu_dev);
154 - if (!np)
155 - return -ENOENT;
156 -
157 - ret = of_device_is_compatible(np, "operating-points-v2-kryo-cpu");
158 - if (!ret) {
159 - of_node_put(np);
160 - return -ENOENT;
161 - }
162 -
163 - speedbin_nvmem = of_nvmem_cell_get(np, NULL);
164 - of_node_put(np);
165 - if (IS_ERR(speedbin_nvmem)) {
166 - if (PTR_ERR(speedbin_nvmem) != -EPROBE_DEFER)
167 - dev_err(cpu_dev, "Could not get nvmem cell: %ld\n",
168 - PTR_ERR(speedbin_nvmem));
169 - return PTR_ERR(speedbin_nvmem);
170 - }
171 -
172 - speedbin = nvmem_cell_read(speedbin_nvmem, &len);
173 - nvmem_cell_put(speedbin_nvmem);
174 - if (IS_ERR(speedbin))
175 - return PTR_ERR(speedbin);
176 -
177 - switch (msm8996_version) {
178 - case MSM8996_V3:
179 - versions = 1 << (unsigned int)(*speedbin);
180 - break;
181 - case MSM8996_SG:
182 - versions = 1 << ((unsigned int)(*speedbin) + 4);
183 - break;
184 - default:
185 - BUG();
186 - break;
187 - }
188 - kfree(speedbin);
189 -
190 - opp_tables = kcalloc(num_possible_cpus(), sizeof(*opp_tables), GFP_KERNEL);
191 - if (!opp_tables)
192 - return -ENOMEM;
193 -
194 - for_each_possible_cpu(cpu) {
195 - cpu_dev = get_cpu_device(cpu);
196 - if (NULL == cpu_dev) {
197 - ret = -ENODEV;
198 - goto free_opp;
199 - }
200 -
201 - opp_tables[cpu] = dev_pm_opp_set_supported_hw(cpu_dev,
202 - &versions, 1);
203 - if (IS_ERR(opp_tables[cpu])) {
204 - ret = PTR_ERR(opp_tables[cpu]);
205 - dev_err(cpu_dev, "Failed to set supported hardware\n");
206 - goto free_opp;
207 - }
208 - }
209 -
210 - cpufreq_dt_pdev = platform_device_register_simple("cpufreq-dt", -1,
211 - NULL, 0);
212 - if (!IS_ERR(cpufreq_dt_pdev)) {
213 - platform_set_drvdata(pdev, opp_tables);
214 - return 0;
215 - }
216 -
217 - ret = PTR_ERR(cpufreq_dt_pdev);
218 - dev_err(cpu_dev, "Failed to register platform device\n");
219 -
220 -free_opp:
221 - for_each_possible_cpu(cpu) {
222 - if (IS_ERR_OR_NULL(opp_tables[cpu]))
223 - break;
224 - dev_pm_opp_put_supported_hw(opp_tables[cpu]);
225 - }
226 - kfree(opp_tables);
227 -
228 - return ret;
229 -}
230 -
231 -static int qcom_cpufreq_kryo_remove(struct platform_device *pdev)
232 -{
233 - struct opp_table **opp_tables = platform_get_drvdata(pdev);
234 - unsigned int cpu;
235 -
236 - platform_device_unregister(cpufreq_dt_pdev);
237 -
238 - for_each_possible_cpu(cpu)
239 - dev_pm_opp_put_supported_hw(opp_tables[cpu]);
240 -
241 - kfree(opp_tables);
242 -
243 - return 0;
244 -}
245 -
246 -static struct platform_driver qcom_cpufreq_kryo_driver = {
247 - .probe = qcom_cpufreq_kryo_probe,
248 - .remove = qcom_cpufreq_kryo_remove,
249 - .driver = {
250 - .name = "qcom-cpufreq-kryo",
251 - },
252 -};
253 -
254 -static const struct of_device_id qcom_cpufreq_kryo_match_list[] __initconst = {
255 - { .compatible = "qcom,apq8096", },
256 - { .compatible = "qcom,msm8996", },
257 - {}
258 -};
259 -
260 -/*
261 - * Since the driver depends on smem and nvmem drivers, which may
262 - * return EPROBE_DEFER, all the real activity is done in the probe,
263 - * which may be defered as well. The init here is only registering
264 - * the driver and the platform device.
265 - */
266 -static int __init qcom_cpufreq_kryo_init(void)
267 -{
268 - struct device_node *np = of_find_node_by_path("/");
269 - const struct of_device_id *match;
270 - int ret;
271 -
272 - if (!np)
273 - return -ENODEV;
274 -
275 - match = of_match_node(qcom_cpufreq_kryo_match_list, np);
276 - of_node_put(np);
277 - if (!match)
278 - return -ENODEV;
279 -
280 - ret = platform_driver_register(&qcom_cpufreq_kryo_driver);
281 - if (unlikely(ret < 0))
282 - return ret;
283 -
284 - kryo_cpufreq_pdev = platform_device_register_simple(
285 - "qcom-cpufreq-kryo", -1, NULL, 0);
286 - ret = PTR_ERR_OR_ZERO(kryo_cpufreq_pdev);
287 - if (0 == ret)
288 - return 0;
289 -
290 - platform_driver_unregister(&qcom_cpufreq_kryo_driver);
291 - return ret;
292 -}
293 -module_init(qcom_cpufreq_kryo_init);
294 -
295 -static void __exit qcom_cpufreq_kryo_exit(void)
296 -{
297 - platform_device_unregister(kryo_cpufreq_pdev);
298 - platform_driver_unregister(&qcom_cpufreq_kryo_driver);
299 -}
300 -module_exit(qcom_cpufreq_kryo_exit);
301 -
302 -MODULE_DESCRIPTION("Qualcomm Technologies, Inc. Kryo CPUfreq driver");
303 -MODULE_LICENSE("GPL v2");
304 --- /dev/null
305 +++ b/drivers/cpufreq/qcom-cpufreq-nvmem.c
306 @@ -0,0 +1,273 @@
307 +// SPDX-License-Identifier: GPL-2.0
308 +/*
309 + * Copyright (c) 2018, The Linux Foundation. All rights reserved.
310 + */
311 +
312 +/*
313 + * In Certain QCOM SoCs like apq8096 and msm8996 that have KRYO processors,
314 + * the CPU frequency subset and voltage value of each OPP varies
315 + * based on the silicon variant in use. Qualcomm Process Voltage Scaling Tables
316 + * defines the voltage and frequency value based on the msm-id in SMEM
317 + * and speedbin blown in the efuse combination.
318 + * The qcom-cpufreq-nvmem driver reads the msm-id and efuse value from the SoC
319 + * to provide the OPP framework with required information.
320 + * This is used to determine the voltage and frequency value for each OPP of
321 + * operating-points-v2 table when it is parsed by the OPP framework.
322 + */
323 +
324 +#include <linux/cpu.h>
325 +#include <linux/err.h>
326 +#include <linux/init.h>
327 +#include <linux/kernel.h>
328 +#include <linux/module.h>
329 +#include <linux/nvmem-consumer.h>
330 +#include <linux/of.h>
331 +#include <linux/of_device.h>
332 +#include <linux/platform_device.h>
333 +#include <linux/pm_opp.h>
334 +#include <linux/slab.h>
335 +#include <linux/soc/qcom/smem.h>
336 +
337 +#define MSM_ID_SMEM 137
338 +
339 +enum _msm_id {
340 + MSM8996V3 = 0xF6ul,
341 + APQ8096V3 = 0x123ul,
342 + MSM8996SG = 0x131ul,
343 + APQ8096SG = 0x138ul,
344 +};
345 +
346 +enum _msm8996_version {
347 + MSM8996_V3,
348 + MSM8996_SG,
349 + NUM_OF_MSM8996_VERSIONS,
350 +};
351 +
352 +static struct platform_device *cpufreq_dt_pdev, *cpufreq_pdev;
353 +
354 +static enum _msm8996_version qcom_cpufreq_get_msm_id(void)
355 +{
356 + size_t len;
357 + u32 *msm_id;
358 + enum _msm8996_version version;
359 +
360 + msm_id = qcom_smem_get(QCOM_SMEM_HOST_ANY, MSM_ID_SMEM, &len);
361 + if (IS_ERR(msm_id))
362 + return NUM_OF_MSM8996_VERSIONS;
363 +
364 + /* The first 4 bytes are format, next to them is the actual msm-id */
365 + msm_id++;
366 +
367 + switch ((enum _msm_id)*msm_id) {
368 + case MSM8996V3:
369 + case APQ8096V3:
370 + version = MSM8996_V3;
371 + break;
372 + case MSM8996SG:
373 + case APQ8096SG:
374 + version = MSM8996_SG;
375 + break;
376 + default:
377 + version = NUM_OF_MSM8996_VERSIONS;
378 + }
379 +
380 + return version;
381 +}
382 +
383 +static int qcom_cpufreq_kryo_name_version(struct device *cpu_dev,
384 + struct nvmem_cell *speedbin_nvmem,
385 + u32 *versions)
386 +{
387 + size_t len;
388 + u8 *speedbin;
389 + enum _msm8996_version msm8996_version;
390 +
391 + msm8996_version = qcom_cpufreq_get_msm_id();
392 + if (NUM_OF_MSM8996_VERSIONS == msm8996_version) {
393 + dev_err(cpu_dev, "Not Snapdragon 820/821!");
394 + return -ENODEV;
395 + }
396 +
397 + speedbin = nvmem_cell_read(speedbin_nvmem, &len);
398 + if (IS_ERR(speedbin))
399 + return PTR_ERR(speedbin);
400 +
401 + switch (msm8996_version) {
402 + case MSM8996_V3:
403 + *versions = 1 << (unsigned int)(*speedbin);
404 + break;
405 + case MSM8996_SG:
406 + *versions = 1 << ((unsigned int)(*speedbin) + 4);
407 + break;
408 + default:
409 + BUG();
410 + break;
411 + }
412 +
413 + kfree(speedbin);
414 + return 0;
415 +}
416 +
417 +static int qcom_cpufreq_probe(struct platform_device *pdev)
418 +{
419 + struct opp_table **opp_tables;
420 + int (*get_version)(struct device *cpu_dev,
421 + struct nvmem_cell *speedbin_nvmem,
422 + u32 *versions);
423 + struct nvmem_cell *speedbin_nvmem;
424 + struct device_node *np;
425 + struct device *cpu_dev;
426 + unsigned cpu;
427 + u32 versions;
428 + const struct of_device_id *match;
429 + int ret;
430 +
431 + cpu_dev = get_cpu_device(0);
432 + if (!cpu_dev)
433 + return -ENODEV;
434 +
435 + match = pdev->dev.platform_data;
436 + get_version = match->data;
437 + if (!get_version)
438 + return -ENODEV;
439 +
440 + np = dev_pm_opp_of_get_opp_desc_node(cpu_dev);
441 + if (!np)
442 + return -ENOENT;
443 +
444 + ret = of_device_is_compatible(np, "operating-points-v2-kryo-cpu");
445 + if (!ret) {
446 + of_node_put(np);
447 + return -ENOENT;
448 + }
449 +
450 + speedbin_nvmem = of_nvmem_cell_get(np, NULL);
451 + of_node_put(np);
452 + if (IS_ERR(speedbin_nvmem)) {
453 + if (PTR_ERR(speedbin_nvmem) != -EPROBE_DEFER)
454 + dev_err(cpu_dev, "Could not get nvmem cell: %ld\n",
455 + PTR_ERR(speedbin_nvmem));
456 + return PTR_ERR(speedbin_nvmem);
457 + }
458 +
459 + ret = get_version(cpu_dev, speedbin_nvmem, &versions);
460 + nvmem_cell_put(speedbin_nvmem);
461 + if (ret)
462 + return ret;
463 +
464 + opp_tables = kcalloc(num_possible_cpus(), sizeof(*opp_tables), GFP_KERNEL);
465 + if (!opp_tables)
466 + return -ENOMEM;
467 +
468 + for_each_possible_cpu(cpu) {
469 + cpu_dev = get_cpu_device(cpu);
470 + if (NULL == cpu_dev) {
471 + ret = -ENODEV;
472 + goto free_opp;
473 + }
474 +
475 + opp_tables[cpu] = dev_pm_opp_set_supported_hw(cpu_dev,
476 + &versions, 1);
477 + if (IS_ERR(opp_tables[cpu])) {
478 + ret = PTR_ERR(opp_tables[cpu]);
479 + dev_err(cpu_dev, "Failed to set supported hardware\n");
480 + goto free_opp;
481 + }
482 + }
483 +
484 + cpufreq_dt_pdev = platform_device_register_simple("cpufreq-dt", -1,
485 + NULL, 0);
486 + if (!IS_ERR(cpufreq_dt_pdev)) {
487 + platform_set_drvdata(pdev, opp_tables);
488 + return 0;
489 + }
490 +
491 + ret = PTR_ERR(cpufreq_dt_pdev);
492 + dev_err(cpu_dev, "Failed to register platform device\n");
493 +
494 +free_opp:
495 + for_each_possible_cpu(cpu) {
496 + if (IS_ERR_OR_NULL(opp_tables[cpu]))
497 + break;
498 + dev_pm_opp_put_supported_hw(opp_tables[cpu]);
499 + }
500 + kfree(opp_tables);
501 +
502 + return ret;
503 +}
504 +
505 +static int qcom_cpufreq_remove(struct platform_device *pdev)
506 +{
507 + struct opp_table **opp_tables = platform_get_drvdata(pdev);
508 + unsigned int cpu;
509 +
510 + platform_device_unregister(cpufreq_dt_pdev);
511 +
512 + for_each_possible_cpu(cpu)
513 + dev_pm_opp_put_supported_hw(opp_tables[cpu]);
514 +
515 + kfree(opp_tables);
516 +
517 + return 0;
518 +}
519 +
520 +static struct platform_driver qcom_cpufreq_driver = {
521 + .probe = qcom_cpufreq_probe,
522 + .remove = qcom_cpufreq_remove,
523 + .driver = {
524 + .name = "qcom-cpufreq-nvmem",
525 + },
526 +};
527 +
528 +static const struct of_device_id qcom_cpufreq_match_list[] __initconst = {
529 + { .compatible = "qcom,apq8096",
530 + .data = qcom_cpufreq_kryo_name_version },
531 + { .compatible = "qcom,msm8996",
532 + .data = qcom_cpufreq_kryo_name_version },
533 + {},
534 +};
535 +
536 +/*
537 + * Since the driver depends on smem and nvmem drivers, which may
538 + * return EPROBE_DEFER, all the real activity is done in the probe,
539 + * which may be defered as well. The init here is only registering
540 + * the driver and the platform device.
541 + */
542 +static int __init qcom_cpufreq_init(void)
543 +{
544 + struct device_node *np = of_find_node_by_path("/");
545 + const struct of_device_id *match;
546 + int ret;
547 +
548 + if (!np)
549 + return -ENODEV;
550 +
551 + match = of_match_node(qcom_cpufreq_match_list, np);
552 + of_node_put(np);
553 + if (!match)
554 + return -ENODEV;
555 +
556 + ret = platform_driver_register(&qcom_cpufreq_driver);
557 + if (unlikely(ret < 0))
558 + return ret;
559 +
560 + cpufreq_pdev = platform_device_register_data(NULL, "qcom-cpufreq-nvmem",
561 + -1, match, sizeof(*match));
562 + ret = PTR_ERR_OR_ZERO(cpufreq_pdev);
563 + if (0 == ret)
564 + return 0;
565 +
566 + platform_driver_unregister(&qcom_cpufreq_driver);
567 + return ret;
568 +}
569 +module_init(qcom_cpufreq_init);
570 +
571 +static void __exit qcom_cpufreq_exit(void)
572 +{
573 + platform_device_unregister(cpufreq_pdev);
574 + platform_driver_unregister(&qcom_cpufreq_driver);
575 +}
576 +module_exit(qcom_cpufreq_exit);
577 +
578 +MODULE_DESCRIPTION("Qualcomm Technologies, Inc. CPUfreq driver");
579 +MODULE_LICENSE("GPL v2");