ipq806x: refresh 4.19 patches
[openwrt/staging/dedeckeh.git] / target / linux / ipq806x / patches-4.19 / 0034-0004-dt-bindings-clock-Document-qcom-hfpll.patch
1 From 1f924faa8b1e4789ecc06ed0dd58ca3487c89012 Mon Sep 17 00:00:00 2001
2 From: Stephen Boyd <sboyd@codeaurora.org>
3 Date: Tue, 14 Aug 2018 17:42:23 +0530
4 Subject: [PATCH 04/12] dt-bindings: clock: Document qcom,hfpll
5
6 Adds bindings document for qcom,hfpll instantiated within
7 the Krait processor subsystem as separate register region.
8
9 Reviewed-by: Rob Herring <robh@kernel.org>
10 Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
11 Signed-off-by: Sricharan R <sricharan@codeaurora.org>
12 Tested-by: Craig Tatlor <ctatlor97@gmail.com>
13 Signed-off-by: Stephen Boyd <sboyd@kernel.org>
14 ---
15 .../devicetree/bindings/clock/qcom,hfpll.txt | 60 +++++++++++++++++++
16 1 file changed, 60 insertions(+)
17 create mode 100644 Documentation/devicetree/bindings/clock/qcom,hfpll.txt
18
19 --- /dev/null
20 +++ b/Documentation/devicetree/bindings/clock/qcom,hfpll.txt
21 @@ -0,0 +1,60 @@
22 +High-Frequency PLL (HFPLL)
23 +
24 +PROPERTIES
25 +
26 +- compatible:
27 + Usage: required
28 + Value type: <string>:
29 + shall contain only one of the following. The generic
30 + compatible "qcom,hfpll" should be also included.
31 +
32 + "qcom,hfpll-ipq8064", "qcom,hfpll"
33 + "qcom,hfpll-apq8064", "qcom,hfpll"
34 + "qcom,hfpll-msm8974", "qcom,hfpll"
35 + "qcom,hfpll-msm8960", "qcom,hfpll"
36 +
37 +- reg:
38 + Usage: required
39 + Value type: <prop-encoded-array>
40 + Definition: address and size of HPLL registers. An optional second
41 + element specifies the address and size of the alias
42 + register region.
43 +
44 +- clocks:
45 + Usage: required
46 + Value type: <prop-encoded-array>
47 + Definition: reference to the xo clock.
48 +
49 +- clock-names:
50 + Usage: required
51 + Value type: <stringlist>
52 + Definition: must be "xo".
53 +
54 +- clock-output-names:
55 + Usage: required
56 + Value type: <string>
57 + Definition: Name of the PLL. Typically hfpllX where X is a CPU number
58 + starting at 0. Otherwise hfpll_Y where Y is more specific
59 + such as "l2".
60 +
61 +Example:
62 +
63 +1) An HFPLL for the L2 cache.
64 +
65 + clock-controller@f9016000 {
66 + compatible = "qcom,hfpll-ipq8064", "qcom,hfpll";
67 + reg = <0xf9016000 0x30>;
68 + clocks = <&xo_board>;
69 + clock-names = "xo";
70 + clock-output-names = "hfpll_l2";
71 + };
72 +
73 +2) An HFPLL for CPU0. This HFPLL has the alias register region.
74 +
75 + clock-controller@f908a000 {
76 + compatible = "qcom,hfpll-ipq8064", "qcom,hfpll";
77 + reg = <0xf908a000 0x30>, <0xf900a000 0x30>;
78 + clocks = <&xo_board>;
79 + clock-names = "xo";
80 + clock-output-names = "hfpll0";
81 + };