target/linux/ipq806x/patches-3.18/708-ARM-dts-qcom-add-gmac-nodes-to-ipq806x-platforms.patch

   1 From cab1f4720e82f2e17eaeed9a9ad9e4f07c742977 Mon Sep 17 00:00:00 2001
   2 From: Mathieu Olivari <mathieu@codeaurora.org>
   3 Date: Mon, 11 May 2015 12:29:18 -0700
   4 Subject: [PATCH 8/8] ARM: dts: qcom: add gmac nodes to ipq806x platforms
   5
   6 Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
   7 ---
   8  arch/arm/boot/dts/qcom-ipq8064-ap148.dts | 31 ++++++++++++
   9  arch/arm/boot/dts/qcom-ipq8064-db149.dts | 43 ++++++++++++++++
  10  arch/arm/boot/dts/qcom-ipq8064.dtsi      | 86 ++++++++++++++++++++++++++++++++
  11  3 files changed, 160 insertions(+)
  12
  13 --- a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
  14 +++ b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
  15 @@ -78,6 +78,16 @@
  16                                         bias-disable;
  17                                 };
  18                         };
  19 +
  20 +                       rgmii2_pins: rgmii2_pins {
  21 +                               mux {
  22 +                                       pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32",
  23 +                                              "gpio51", "gpio52", "gpio59", "gpio60", "gpio61", "gpio62" ;
  24 +                                       function = "rgmii2";
  25 +                                       drive-strength = <8>;
  26 +                                       bias-disable;
  27 +                               };
  28 +                       };
  29                 };
  30
  31                 gsbi@16300000 {
  32 @@ -200,6 +210,31 @@
  33                                 reg = <4>;
  34                         };
  35                 };
  36 +
  37 +               gmac1: ethernet@37200000 {
  38 +                       status = "ok";
  39 +                       phy-mode = "rgmii";
  40 +                       qcom,id = <1>;
  41 +
  42 +                       pinctrl-0 = <&rgmii2_pins>;
  43 +                       pinctrl-names = "default";
  44 +
  45 +                       fixed-link {
  46 +                               speed = <1000>;
  47 +                               full-duplex;
  48 +                       };
  49 +               };
  50 +
  51 +               gmac2: ethernet@37400000 {
  52 +                       status = "ok";
  53 +                       phy-mode = "sgmii";
  54 +                       qcom,id = <2>;
  55 +
  56 +                       fixed-link {
  57 +                               speed = <1000>;
  58 +                               full-duplex;
  59 +                       };
  60 +               };
  61         };
  62  };
  63
  64 --- a/arch/arm/boot/dts/qcom-ipq8064-db149.dts
  65 +++ b/arch/arm/boot/dts/qcom-ipq8064-db149.dts
  66 @@ -48,6 +48,14 @@
  67                                         bias-disable;
  68                                 };
  69                         };
  70 +
  71 +                       rgmii0_pins: rgmii0_pins {
  72 +                               mux {
  73 +                                       pins = "gpio2", "gpio66";
  74 +                                       drive-strength = <8>;
  75 +                                       bias-disable;
  76 +                               };
  77 +                       };
  78                 };
  79
  80                 gsbi2: gsbi@12480000 {
  81 @@ -189,5 +197,40 @@
  82                                 reg = <7>;
  83                         };
  84                 };
  85 +
  86 +               gmac0: ethernet@37000000 {
  87 +                       status = "ok";
  88 +                       phy-mode = "rgmii";
  89 +                       qcom,id = <0>;
  90 +                       phy-handle = <&phy4>;
  91 +
  92 +                       pinctrl-0 = <&rgmii0_pins>;
  93 +                       pinctrl-names = "default";
  94 +               };
  95 +
  96 +               gmac1: ethernet@37200000 {
  97 +                       status = "ok";
  98 +                       phy-mode = "sgmii";
  99 +                       qcom,id = <1>;
 100 +
 101 +                       fixed-link {
 102 +                               speed = <1000>;
 103 +                               full-duplex;
 104 +                       };
 105 +               };
 106 +
 107 +               gmac2: ethernet@37400000 {
 108 +                       status = "ok";
 109 +                       phy-mode = "sgmii";
 110 +                       qcom,id = <2>;
 111 +                       phy-handle = <&phy6>;
 112 +               };
 113 +
 114 +               gmac3: ethernet@37600000 {
 115 +                       status = "ok";
 116 +                       phy-mode = "sgmii";
 117 +                       qcom,id = <3>;
 118 +                       phy-handle = <&phy7>;
 119 +               };
 120         };
 121  };
 122 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
 123 +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
 124 @@ -741,6 +741,92 @@
 125                         status = "disabled";
 126                 };
 127
 128 +               nss_common: syscon@03000000 {
 129 +                       compatible = "syscon";
 130 +                       reg = <0x03000000 0x0000FFFF>;
 131 +               };
 132 +
 133 +               qsgmii_csr: syscon@1bb00000 {
 134 +                       compatible = "syscon";
 135 +                       reg = <0x1bb00000 0x000001FF>;
 136 +               };
 137 +
 138 +               gmac0: ethernet@37000000 {
 139 +                       device_type = "network";
 140 +                       compatible = "qcom,ipq806x-gmac";
 141 +                       reg = <0x37000000 0x200000>;
 142 +                       interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>;
 143 +                       interrupt-names = "macirq";
 144 +
 145 +                       qcom,nss-common = <&nss_common>;
 146 +                       qcom,qsgmii-csr = <&qsgmii_csr>;
 147 +
 148 +                       clocks = <&gcc GMAC_CORE1_CLK>;
 149 +                       clock-names = "stmmaceth";
 150 +
 151 +                       resets = <&gcc GMAC_CORE1_RESET>;
 152 +                       reset-names = "stmmaceth";
 153 +
 154 +                       status = "disabled";
 155 +               };
 156 +
 157 +               gmac1: ethernet@37200000 {
 158 +                       device_type = "network";
 159 +                       compatible = "qcom,ipq806x-gmac";
 160 +                       reg = <0x37200000 0x200000>;
 161 +                       interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
 162 +                       interrupt-names = "macirq";
 163 +
 164 +                       qcom,nss-common = <&nss_common>;
 165 +                       qcom,qsgmii-csr = <&qsgmii_csr>;
 166 +
 167 +                       clocks = <&gcc GMAC_CORE2_CLK>;
 168 +                       clock-names = "stmmaceth";
 169 +
 170 +                       resets = <&gcc GMAC_CORE2_RESET>;
 171 +                       reset-names = "stmmaceth";
 172 +
 173 +                       status = "disabled";
 174 +               };
 175 +
 176 +               gmac2: ethernet@37400000 {
 177 +                       device_type = "network";
 178 +                       compatible = "qcom,ipq806x-gmac";
 179 +                       reg = <0x37400000 0x200000>;
 180 +                       interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
 181 +                       interrupt-names = "macirq";
 182 +
 183 +                       qcom,nss-common = <&nss_common>;
 184 +                       qcom,qsgmii-csr = <&qsgmii_csr>;
 185 +
 186 +                       clocks = <&gcc GMAC_CORE3_CLK>;
 187 +                       clock-names = "stmmaceth";
 188 +
 189 +                       resets = <&gcc GMAC_CORE3_RESET>;
 190 +                       reset-names = "stmmaceth";
 191 +
 192 +                       status = "disabled";
 193 +               };
 194 +
 195 +               gmac3: ethernet@37600000 {
 196 +                       device_type = "network";
 197 +                       compatible = "qcom,ipq806x-gmac";
 198 +                       reg = <0x37600000 0x200000>;
 199 +                       interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>;
 200 +                       interrupt-names = "macirq";
 201 +
 202 +                       qcom,nss-common = <&nss_common>;
 203 +                       qcom,qsgmii-csr = <&qsgmii_csr>;
 204 +
 205 +                       clocks = <&gcc GMAC_CORE4_CLK>;
 206 +                       clock-names = "stmmaceth";
 207 +
 208 +                       resets = <&gcc GMAC_CORE4_RESET>;
 209 +                       reset-names = "stmmaceth";
 210 +
 211 +                       status = "disabled";
 212 +               };
 213 +
 214         };
 215
 216         sfpb_mutex: sfpb-mutex {