kernel: update 3.14 to 3.14.18
[openwrt/staging/stintel.git] / target / linux / ipq806x / patches / 0133-spi-qup-Remove-chip-select-function.patch
1 From 9bc674f40f22596ef8c2ff6d7f9e53da0baa57e9 Mon Sep 17 00:00:00 2001
2 From: Andy Gross <agross@codeaurora.org>
3 Date: Thu, 12 Jun 2014 14:34:10 -0500
4 Subject: [PATCH 133/182] spi: qup: Remove chip select function
5
6 This patch removes the chip select function. Chip select should instead be
7 supported using GPIOs, defining the DT entry "cs-gpios", and letting the SPI
8 core assert/deassert the chip select as it sees fit.
9
10 Signed-off-by: Andy Gross <agross@codeaurora.org>
11 ---
12 .../devicetree/bindings/spi/qcom,spi-qup.txt | 6 ++++
13 drivers/spi/spi-qup.c | 33 ++++----------------
14 2 files changed, 12 insertions(+), 27 deletions(-)
15
16 --- a/Documentation/devicetree/bindings/spi/qcom,spi-qup.txt
17 +++ b/Documentation/devicetree/bindings/spi/qcom,spi-qup.txt
18 @@ -23,6 +23,12 @@ Optional properties:
19 - spi-max-frequency: Specifies maximum SPI clock frequency,
20 Units - Hz. Definition as per
21 Documentation/devicetree/bindings/spi/spi-bus.txt
22 +- num-cs: total number of chipselects
23 +- cs-gpios: should specify GPIOs used for chipselects.
24 + The gpios will be referred to as reg = <index> in the SPI child
25 + nodes. If unspecified, a single SPI device without a chip
26 + select can be used.
27 +
28
29 SPI slave nodes must be children of the SPI master node and can contain
30 properties described in Documentation/devicetree/bindings/spi/spi-bus.txt
31 --- a/drivers/spi/spi-qup.c
32 +++ b/drivers/spi/spi-qup.c
33 @@ -424,31 +424,6 @@ static int spi_qup_io_config(struct spi_
34 return 0;
35 }
36
37 -static void spi_qup_set_cs(struct spi_device *spi, bool enable)
38 -{
39 - struct spi_qup *controller = spi_master_get_devdata(spi->master);
40 -
41 - u32 iocontol, mask;
42 -
43 - iocontol = readl_relaxed(controller->base + SPI_IO_CONTROL);
44 -
45 - /* Disable auto CS toggle and use manual */
46 - iocontol &= ~SPI_IO_C_MX_CS_MODE;
47 - iocontol |= SPI_IO_C_FORCE_CS;
48 -
49 - iocontol &= ~SPI_IO_C_CS_SELECT_MASK;
50 - iocontol |= SPI_IO_C_CS_SELECT(spi->chip_select);
51 -
52 - mask = SPI_IO_C_CS_N_POLARITY_0 << spi->chip_select;
53 -
54 - if (enable)
55 - iocontol |= mask;
56 - else
57 - iocontol &= ~mask;
58 -
59 - writel_relaxed(iocontol, controller->base + SPI_IO_CONTROL);
60 -}
61 -
62 static int spi_qup_transfer_one(struct spi_master *master,
63 struct spi_device *spi,
64 struct spi_transfer *xfer)
65 @@ -571,12 +546,16 @@ static int spi_qup_probe(struct platform
66 return -ENOMEM;
67 }
68
69 + /* use num-cs unless not present or out of range */
70 + if (of_property_read_u16(dev->of_node, "num-cs",
71 + &master->num_chipselect) ||
72 + (master->num_chipselect > SPI_NUM_CHIPSELECTS))
73 + master->num_chipselect = SPI_NUM_CHIPSELECTS;
74 +
75 master->bus_num = pdev->id;
76 master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LOOP;
77 - master->num_chipselect = SPI_NUM_CHIPSELECTS;
78 master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 32);
79 master->max_speed_hz = max_freq;
80 - master->set_cs = spi_qup_set_cs;
81 master->transfer_one = spi_qup_transfer_one;
82 master->dev.of_node = pdev->dev.of_node;
83 master->auto_runtime_pm = true;