kernel: update 3.14 to 3.14.18
[openwrt/staging/luka.git] / target / linux / ipq806x / patches / 0109-libahci-Allow-drivers-to-override-start_engine.patch
1 From 10f3c772363e549c3dbd3cc3755d270c5656d5b8 Mon Sep 17 00:00:00 2001
2 From: Hans de Goede <hdegoede@redhat.com>
3 Date: Sat, 22 Feb 2014 16:53:30 +0100
4 Subject: [PATCH 109/182] libahci: Allow drivers to override start_engine
5
6 Allwinner A10 and A20 ARM SoCs have an AHCI sata controller which needs a
7 special register to be poked before starting the DMA engine.
8
9 This register gets reset on an ahci_stop_engine call, so there is no other
10 place then ahci_start_engine where this poking can be done.
11
12 This commit allows drivers to override ahci_start_engine behavior for use by
13 the Allwinner AHCI driver (and potentially other drivers in the future).
14
15 Signed-off-by: Hans de Goede <hdegoede@redhat.com>
16 Signed-off-by: Tejun Heo <tj@kernel.org>
17 ---
18 drivers/ata/ahci.c | 6 ++++--
19 drivers/ata/ahci.h | 6 ++++++
20 drivers/ata/libahci.c | 26 +++++++++++++++++++-------
21 drivers/ata/sata_highbank.c | 3 ++-
22 4 files changed, 31 insertions(+), 10 deletions(-)
23
24 --- a/drivers/ata/ahci.c
25 +++ b/drivers/ata/ahci.c
26 @@ -583,6 +583,7 @@ static int ahci_vt8251_hardreset(struct
27 unsigned long deadline)
28 {
29 struct ata_port *ap = link->ap;
30 + struct ahci_host_priv *hpriv = ap->host->private_data;
31 bool online;
32 int rc;
33
34 @@ -593,7 +594,7 @@ static int ahci_vt8251_hardreset(struct
35 rc = sata_link_hardreset(link, sata_ehc_deb_timing(&link->eh_context),
36 deadline, &online, NULL);
37
38 - ahci_start_engine(ap);
39 + hpriv->start_engine(ap);
40
41 DPRINTK("EXIT, rc=%d, class=%u\n", rc, *class);
42
43 @@ -608,6 +609,7 @@ static int ahci_p5wdh_hardreset(struct a
44 {
45 struct ata_port *ap = link->ap;
46 struct ahci_port_priv *pp = ap->private_data;
47 + struct ahci_host_priv *hpriv = ap->host->private_data;
48 u8 *d2h_fis = pp->rx_fis + RX_FIS_D2H_REG;
49 struct ata_taskfile tf;
50 bool online;
51 @@ -623,7 +625,7 @@ static int ahci_p5wdh_hardreset(struct a
52 rc = sata_link_hardreset(link, sata_ehc_deb_timing(&link->eh_context),
53 deadline, &online, NULL);
54
55 - ahci_start_engine(ap);
56 + hpriv->start_engine(ap);
57
58 /* The pseudo configuration device on SIMG4726 attached to
59 * ASUS P5W-DH Deluxe doesn't send signature FIS after
60 --- a/drivers/ata/ahci.h
61 +++ b/drivers/ata/ahci.h
62 @@ -324,6 +324,12 @@ struct ahci_host_priv {
63 u32 em_msg_type; /* EM message type */
64 struct clk *clk; /* Only for platforms supporting clk */
65 void *plat_data; /* Other platform data */
66 + /*
67 + * Optional ahci_start_engine override, if not set this gets set to the
68 + * default ahci_start_engine during ahci_save_initial_config, this can
69 + * be overridden anytime before the host is activated.
70 + */
71 + void (*start_engine)(struct ata_port *ap);
72 };
73
74 extern int ahci_ignore_sss;
75 --- a/drivers/ata/libahci.c
76 +++ b/drivers/ata/libahci.c
77 @@ -394,6 +394,9 @@ static ssize_t ahci_show_em_supported(st
78 *
79 * If inconsistent, config values are fixed up by this function.
80 *
81 + * If it is not set already this function sets hpriv->start_engine to
82 + * ahci_start_engine.
83 + *
84 * LOCKING:
85 * None.
86 */
87 @@ -500,6 +503,9 @@ void ahci_save_initial_config(struct dev
88 hpriv->cap = cap;
89 hpriv->cap2 = cap2;
90 hpriv->port_map = port_map;
91 +
92 + if (!hpriv->start_engine)
93 + hpriv->start_engine = ahci_start_engine;
94 }
95 EXPORT_SYMBOL_GPL(ahci_save_initial_config);
96
97 @@ -766,7 +772,7 @@ static void ahci_start_port(struct ata_p
98
99 /* enable DMA */
100 if (!(hpriv->flags & AHCI_HFLAG_DELAY_ENGINE))
101 - ahci_start_engine(ap);
102 + hpriv->start_engine(ap);
103
104 /* turn on LEDs */
105 if (ap->flags & ATA_FLAG_EM) {
106 @@ -1234,7 +1240,7 @@ int ahci_kick_engine(struct ata_port *ap
107
108 /* restart engine */
109 out_restart:
110 - ahci_start_engine(ap);
111 + hpriv->start_engine(ap);
112 return rc;
113 }
114 EXPORT_SYMBOL_GPL(ahci_kick_engine);
115 @@ -1426,6 +1432,7 @@ static int ahci_hardreset(struct ata_lin
116 const unsigned long *timing = sata_ehc_deb_timing(&link->eh_context);
117 struct ata_port *ap = link->ap;
118 struct ahci_port_priv *pp = ap->private_data;
119 + struct ahci_host_priv *hpriv = ap->host->private_data;
120 u8 *d2h_fis = pp->rx_fis + RX_FIS_D2H_REG;
121 struct ata_taskfile tf;
122 bool online;
123 @@ -1443,7 +1450,7 @@ static int ahci_hardreset(struct ata_lin
124 rc = sata_link_hardreset(link, timing, deadline, &online,
125 ahci_check_ready);
126
127 - ahci_start_engine(ap);
128 + hpriv->start_engine(ap);
129
130 if (online)
131 *class = ahci_dev_classify(ap);
132 @@ -2007,10 +2014,12 @@ static void ahci_thaw(struct ata_port *a
133
134 void ahci_error_handler(struct ata_port *ap)
135 {
136 + struct ahci_host_priv *hpriv = ap->host->private_data;
137 +
138 if (!(ap->pflags & ATA_PFLAG_FROZEN)) {
139 /* restart engine */
140 ahci_stop_engine(ap);
141 - ahci_start_engine(ap);
142 + hpriv->start_engine(ap);
143 }
144
145 sata_pmp_error_handler(ap);
146 @@ -2031,6 +2040,7 @@ static void ahci_post_internal_cmd(struc
147
148 static void ahci_set_aggressive_devslp(struct ata_port *ap, bool sleep)
149 {
150 + struct ahci_host_priv *hpriv = ap->host->private_data;
151 void __iomem *port_mmio = ahci_port_base(ap);
152 struct ata_device *dev = ap->link.device;
153 u32 devslp, dm, dito, mdat, deto;
154 @@ -2094,7 +2104,7 @@ static void ahci_set_aggressive_devslp(s
155 PORT_DEVSLP_ADSE);
156 writel(devslp, port_mmio + PORT_DEVSLP);
157
158 - ahci_start_engine(ap);
159 + hpriv->start_engine(ap);
160
161 /* enable device sleep feature for the drive */
162 err_mask = ata_dev_set_feature(dev,
163 @@ -2106,6 +2116,7 @@ static void ahci_set_aggressive_devslp(s
164
165 static void ahci_enable_fbs(struct ata_port *ap)
166 {
167 + struct ahci_host_priv *hpriv = ap->host->private_data;
168 struct ahci_port_priv *pp = ap->private_data;
169 void __iomem *port_mmio = ahci_port_base(ap);
170 u32 fbs;
171 @@ -2134,11 +2145,12 @@ static void ahci_enable_fbs(struct ata_p
172 } else
173 dev_err(ap->host->dev, "Failed to enable FBS\n");
174
175 - ahci_start_engine(ap);
176 + hpriv->start_engine(ap);
177 }
178
179 static void ahci_disable_fbs(struct ata_port *ap)
180 {
181 + struct ahci_host_priv *hpriv = ap->host->private_data;
182 struct ahci_port_priv *pp = ap->private_data;
183 void __iomem *port_mmio = ahci_port_base(ap);
184 u32 fbs;
185 @@ -2166,7 +2178,7 @@ static void ahci_disable_fbs(struct ata_
186 pp->fbs_enabled = false;
187 }
188
189 - ahci_start_engine(ap);
190 + hpriv->start_engine(ap);
191 }
192
193 static void ahci_pmp_attach(struct ata_port *ap)
194 --- a/drivers/ata/sata_highbank.c
195 +++ b/drivers/ata/sata_highbank.c
196 @@ -403,6 +403,7 @@ static int ahci_highbank_hardreset(struc
197 static const unsigned long timing[] = { 5, 100, 500};
198 struct ata_port *ap = link->ap;
199 struct ahci_port_priv *pp = ap->private_data;
200 + struct ahci_host_priv *hpriv = ap->host->private_data;
201 u8 *d2h_fis = pp->rx_fis + RX_FIS_D2H_REG;
202 struct ata_taskfile tf;
203 bool online;
204 @@ -431,7 +432,7 @@ static int ahci_highbank_hardreset(struc
205 break;
206 } while (!online && retry--);
207
208 - ahci_start_engine(ap);
209 + hpriv->start_engine(ap);
210
211 if (online)
212 *class = ahci_dev_classify(ap);