1 #include "qcom-ipq8064-v1.0.dtsi"
4 model = "Qualcomm IPQ8064/DB149";
5 compatible = "qcom,ipq8064-db149", "qcom,ipq8064";
8 serial0 = &gsbi2_serial;
16 reg = <0x41200000 0x300000>;
23 rgmii0_pins: rgmii0_pins {
25 pins = "gpio2", "gpio66";
33 qcom,mode = <GSBI_PROT_I2C_UART>;
36 gsbi2_serial: serial@12490000 {
42 qcom,mode = <GSBI_PROT_SPI>;
47 spi-max-frequency = <50000000>;
49 pinctrl-0 = <&spi_pins>;
50 pinctrl-names = "default";
52 cs-gpios = <&qcom_pinmux 20 0>;
55 compatible = "s25fl256s1";
58 spi-max-frequency = <50000000>;
63 label = "lowlevel_init";
69 reg = <0x1b0000 0x80000>;
74 reg = <0x230000 0x40000>;
79 reg = <0x270000 0x40000>;
84 reg = <0x2b0000 0x1d50000>;
121 pinctrl-0 = <&mdio0_pins>;
122 pinctrl-names = "default";
124 phy0: ethernet-phy@0 {
126 qca,ar8327-initvals = <
127 0x00004 0x7600000 /* PAD0_MODE */
128 0x00008 0x1000000 /* PAD5_MODE */
129 0x0000c 0x80 /* PAD6_MODE */
130 0x000e4 0x6a545 /* MAC_POWER_SEL */
131 0x000e0 0xc74164de /* SGMII_CTRL */
132 0x0007c 0x4e /* PORT0_STATUS */
133 0x00094 0x4e /* PORT6_STATUS */
137 phy4: ethernet-phy@4 {
141 phy6: ethernet-phy@6 {
145 phy7: ethernet-phy@7 {
154 phy-handle = <&phy4>;
156 pinctrl-0 = <&rgmii0_pins>;
157 pinctrl-names = "default";
175 phy-handle = <&phy6>;
182 phy-handle = <&phy7>;