target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-fap-421e.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include "qcom-ipq8064-smb208.dtsi"
   4 #include <dt-bindings/input/input.h>
   5 #include <dt-bindings/leds/common.h>
   6
   7 / {
   8         model = "Fortinet FAP-421E";
   9         compatible = "fortinet,fap-421e", "qcom,ipq8064";
  10
  11         memory@42000000 {
  12                 device_type = "memory";
  13                 reg = <0x42000000 0xe000000>;
  14         };
  15
  16         reserved-memory {
  17                 rsvd@41200000 {
  18                         no-map;
  19                         reg = <0x41200000 0x300000>;
  20                 };
  21                 wifi_dump@44000000 {
  22                         no-map;
  23                         reg = <0x44000000 0x600000>;
  24                 };
  25         };
  26
  27         aliases {
  28                 led-boot = &led_power_yellow;
  29                 led-failsafe = &led_power_yellow;
  30                 led-running = &led_power_yellow;
  31                 led-upgrade = &led_power_yellow;
  32                 label-mac-device = &gmac0;
  33         };
  34
  35         chosen {
  36                 bootargs-override = "console=ttyMSM0,9600n8";
  37         };
  38
  39         keys {
  40                 compatible = "gpio-keys";
  41                 pinctrl-0 = <&button_pins>;
  42                 pinctrl-names = "default";
  43
  44                 reset {
  45                         label = "reset";
  46                         gpios = <&qcom_pinmux 56 GPIO_ACTIVE_LOW>;
  47                         linux,code = <KEY_RESTART>;
  48                 };
  49         };
  50
  51         leds {
  52                 compatible = "gpio-leds";
  53                 pinctrl-0 = <&led_pins>;
  54                 pinctrl-names = "default";
  55
  56                 eth1-amber {
  57                         label = "amber:eth1";
  58                         gpios = <&qcom_pinmux 27 GPIO_ACTIVE_LOW>;
  59                 };
  60
  61                 eth1-yellow {
  62                         label = "yellow:eth1";
  63                         gpios = <&qcom_pinmux 26 GPIO_ACTIVE_LOW>;
  64                 };
  65
  66                 eth2-amber {
  67                         label = "amber:eth2";
  68                         gpios = <&qcom_pinmux 29 GPIO_ACTIVE_LOW>;
  69                 };
  70
  71                 eth2-yellow {
  72                         label = "yellow:eth2";
  73                         gpios = <&qcom_pinmux 28 GPIO_ACTIVE_LOW>;
  74                 };
  75
  76                 power-amber {
  77                         function = LED_FUNCTION_POWER;
  78                         color = <LED_COLOR_ID_AMBER>;
  79                         gpios = <&qcom_pinmux 53 GPIO_ACTIVE_LOW>;
  80                 };
  81
  82                 led_power_yellow: power-yellow {
  83                         label = "yellow:power";
  84                         gpios = <&qcom_pinmux 58 GPIO_ACTIVE_LOW>;
  85                 };
  86
  87                 2g-yellow {
  88                         label = "yellow:2g";
  89                         gpios = <&qcom_pinmux 30 GPIO_ACTIVE_LOW>;
  90                 };
  91
  92                 5g-yellow {
  93                         label = "yellow:5g";
  94                         gpios = <&qcom_pinmux 64 GPIO_ACTIVE_LOW>;
  95                 };
  96         };
  97 };
  98
  99 &qcom_pinmux {
 100         button_pins: button_pins {
 101                 mux {
 102                         bias-pull-up;
 103                         drive-strength = <2>;
 104                         pins = "gpio56";
 105                 };
 106         };
 107
 108         led_pins: led_pins {
 109                 mux {
 110                         bias-pull-down;
 111                         drive-strength = <2>;
 112                         function = "gpio";
 113                         output-low;
 114                         pins = "gpio23";
 115                 };
 116         };
 117
 118         rgmii2_pins: rgmii2-pins {
 119                 mux {
 120                         bias-disable;
 121                         drive-strength = <16>;
 122                         function = "rgmii2";
 123                         pins = "gpio66";
 124                 };
 125         };
 126
 127         spi_pins: spi_pins {
 128                 mux {
 129                         pins = "gpio18", "gpio19", "gpio21";
 130                         function = "gsbi5";
 131                         bias-pull-down;
 132                 };
 133
 134                 data {
 135                         pins = "gpio18", "gpio19";
 136                         drive-strength = <10>;
 137                 };
 138
 139                 cs {
 140                         pins = "gpio20";
 141                         drive-strength = <10>;
 142                         bias-pull-up;
 143                 };
 144
 145                 clk {
 146                         pins = "gpio21";
 147                         drive-strength = <12>;
 148                 };
 149         };
 150
 151         uart0_pins: uart0_pins {
 152                 mux {
 153                         bias-disable;
 154                         drive-strength = <12>;
 155                         function = "gsbi7";
 156                         pins = "gpio6", "gpio7";
 157                 };
 158         };
 159
 160         usb_pwr_en_pins: usb_pwr_en_pins {
 161                 mux {
 162                         pins = "gpio22";
 163                         function = "gpio";
 164                         drive-strength = <12>;
 165                         bias-pull-down;
 166                         output-low;
 167                 };
 168         };
 169 };
 170
 171 &gsbi7 {
 172         qcom,mode = <GSBI_PROT_I2C_UART>;
 173
 174         status = "okay";
 175 };
 176
 177 &gsbi7_serial{
 178         pinctrl-0 = <&uart0_pins>;
 179         pinctrl-names = "default";
 180
 181         status = "okay";
 182 };
 183
 184 &gsbi5 {
 185         qcom,mode = <GSBI_PROT_SPI>;
 186
 187         status = "okay";
 188
 189         spi@1a280000 {
 190                 status = "okay";
 191
 192                 pinctrl-0 = <&spi_pins>;
 193                 pinctrl-names = "default";
 194                 cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
 195
 196                 flash@0 {
 197                         compatible = "jedec,spi-nor";
 198                         #address-cells = <1>;
 199                         #size-cells = <1>;
 200                         spi-max-frequency = <50000000>;
 201                         reg = <0>;
 202                         m25p,fast-read;
 203
 204                         partition@0 {
 205                                 label = "SBL1";
 206                                 reg = <0x0 0x20000>;
 207                                 read-only;
 208                         };
 209
 210                         partition@20000 {
 211                                 label = "MIBIB";
 212                                 reg = <0x20000 0x20000>;
 213                                 read-only;
 214                         };
 215
 216                         partition@40000 {
 217                                 label = "SBL2";
 218                                 reg = <0x40000 0x40000>;
 219                                 read-only;
 220                         };
 221
 222                         partition@80000 {
 223                                 label = "SBL3";
 224                                 reg = <0x80000 0x80000>;
 225                                 read-only;
 226                         };
 227
 228                         partition@100000 {
 229                                 label = "DDRCONFIG";
 230                                 reg = <0x100000 0x10000>;
 231                                 read-only;
 232                         };
 233
 234                         partition@110000 {
 235                                 label = "SSD";
 236                                 reg = <0x110000 0x10000>;
 237                                 read-only;
 238                         };
 239
 240                         partition@120000 {
 241                                 label = "TZ";
 242                                 reg = <0x120000 0x80000>;
 243                                 read-only;
 244                         };
 245
 246                         partition@1a0000 {
 247                                 label = "RPM";
 248                                 reg = <0x1a0000 0x80000>;
 249                                 read-only;
 250                         };
 251
 252                         partition@220000 {
 253                                 label = "APPSBL";
 254                                 reg = <0x220000 0x80000>;
 255                                 read-only;
 256
 257                                 nvmem-layout {
 258                                         compatible = "fixed-layout";
 259                                         #address-cells = <1>;
 260                                         #size-cells = <1>;
 261
 262                                         macaddr_appsbl_7ff80: mac-address@7ff80 {
 263                                                 compatible = "mac-base";
 264                                                 reg = <0x7ff80 0xc>;
 265                                                 #nvmem-cell-cells = <1>;
 266                                         };
 267                                 };
 268                         };
 269
 270                         partition@2a0000 {
 271                                 label = "APPSBLENV";
 272                                 reg = <0x2a0000 0x40000>;
 273                         };
 274
 275                         partition@2e0000 {
 276                                 label = "ART";
 277                                 reg = <0x2e0000 0x40000>;
 278                                 read-only;
 279                         };
 280
 281                         partition@320000 {
 282                                 label = "kernel";
 283                                 reg = <0x320000 0x600000>;
 284                         };
 285
 286                         partition@920000 {
 287                                 label = "ubi";
 288                                 reg = <0x920000 0x1400000>;
 289                         };
 290
 291                         partition@1d20000 {
 292                                 label = "reserved";
 293                                 reg = <0x1d20000 0x260000>;
 294                                 read-only;
 295                         };
 296
 297                         partition@1f80000 {
 298                                 label = "config";
 299                                 reg = <0x1f80000 0x80000>;
 300                                 read-only;
 301                         };
 302                 };
 303         };
 304 };
 305
 306 &hs_phy_1 {
 307         status = "okay";
 308 };
 309
 310 &ss_phy_1 {
 311         status = "okay";
 312 };
 313
 314 &usb3_1 {
 315         status = "okay";
 316
 317         pinctrl-0 = <&usb_pwr_en_pins>;
 318         pinctrl-names = "default";
 319 };
 320
 321 &pcie0 {
 322         status = "okay";
 323
 324         bridge@0,0 {
 325                 reg = <0x00000000 0 0 0 0>;
 326                 #address-cells = <3>;
 327                 #size-cells = <2>;
 328                 ranges;
 329
 330                 wifi@1,0 {
 331                         compatible = "pci168c,0040";
 332                         reg = <0x00010000 0 0 0 0>;
 333
 334                         nvmem-cells = <&macaddr_appsbl_7ff80 8>;
 335                         nvmem-cell-names = "mac-address";
 336                 };
 337         };
 338 };
 339
 340 &pcie1 {
 341         status = "okay";
 342
 343         max-link-speed = <1>;
 344
 345         bridge@0,0 {
 346                 reg = <0x00000000 0 0 0 0>;
 347                 #address-cells = <3>;
 348                 #size-cells = <2>;
 349                 ranges;
 350
 351                 wifi@1,0 {
 352                         compatible = "pci168c,0040";
 353                         reg = <0x00010000 0 0 0 0>;
 354
 355                         nvmem-cells = <&macaddr_appsbl_7ff80 16>;
 356                         nvmem-cell-names = "mac-address";
 357                 };
 358         };
 359 };
 360
 361 &adm_dma {
 362         status = "okay";
 363 };
 364
 365 &mdio0 {
 366         status = "okay";
 367
 368         #address-cells = <0x1>;
 369         #size-cells = <0x0>;
 370         gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>,
 371                         <&qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
 372         pinctrl-0 = <&mdio0_pins>;
 373         pinctrl-names = "default";
 374
 375         phy1: ethernet-phy@1 {
 376                 reg = <1>;
 377         };
 378
 379         phy2: ethernet-phy@2 {
 380                 reg = <2>;
 381         };
 382 };
 383
 384 &gmac0 {
 385         status = "okay";
 386
 387         phy-mode = "rgmii";
 388         qcom,id = <0>;
 389         pinctrl-0 = <&rgmii2_pins>;
 390         pinctrl-names = "default";
 391         nvmem-cells = <&macaddr_appsbl_7ff80 0>;
 392         nvmem-cell-names = "mac-address";
 393
 394         fixed-link {
 395                 speed = <1000>;
 396                 full-duplex;
 397         };
 398 };
 399
 400 &gmac2 {
 401         status = "okay";
 402
 403         phy-mode = "sgmii";
 404         qcom,id = <2>;
 405         nvmem-cells = <&macaddr_appsbl_7ff80 1>;
 406         nvmem-cell-names = "mac-address";
 407
 408         fixed-link {
 409                 speed = <1000>;
 410                 full-duplex;
 411         };
 412 };