mediatek: add missing ';;' in shell switch case block
[openwrt/staging/pepe2k.git] / target / linux / ipq40xx / files-6.6 / arch / arm / boot / dts / qcom / qcom-ipq4019-mf18a.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 // Copyright (c) 2022, Pawel Dembicki <paweldembicki@gmail.com>.
3 // Copyright (c) 2022, Marcin Gajda <mgajda@o2.pl>.
4
5
6 #include "qcom-ipq4019.dtsi"
7 #include <dt-bindings/soc/qcom,tcsr.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/leds/common.h>
11
12 / {
13 model = "ZTE MF18A";
14 compatible = "zte,mf18a";
15
16 aliases {
17 led-boot = &led_power;
18 led-failsafe = &led_power;
19 led-running = &led_power;
20 led-upgrade = &led_power;
21 };
22
23 chosen {
24 /*
25 * bootargs forced by u-boot bootipq command:
26 * 'ubi.mtd=rootfs root=mtd:ubi_rootfs rootfstype=squashfs rootwait'
27 */
28 bootargs-append = " root=/dev/ubiblock0_1";
29 };
30
31 gpio-restart {
32 compatible = "gpio-restart";
33 gpios = <&tlmm 8 GPIO_ACTIVE_HIGH>;
34 };
35
36 leds {
37 compatible = "gpio-leds";
38
39 led_internal: led-0 {
40 label = "blue:internal";
41 gpios = <&tlmm 10 GPIO_ACTIVE_LOW>;
42 default-state = "keep";
43 };
44
45 led_power: led-1 {
46 function = LED_FUNCTION_POWER;
47 color = <LED_COLOR_ID_BLUE>;
48 gpios = <&tlmm 48 GPIO_ACTIVE_HIGH>;
49 default-state = "keep";
50 };
51
52 led-2 {
53 function = LED_FUNCTION_WLAN;
54 color = <LED_COLOR_ID_BLUE>;
55 gpios = <&tlmm 23 GPIO_ACTIVE_HIGH>;
56 linux,default-trigger = "phy0tpt";
57 };
58
59 led-3 {
60 function = LED_FUNCTION_WLAN;
61 color = <LED_COLOR_ID_RED>;
62 gpios = <&tlmm 26 GPIO_ACTIVE_HIGH>;
63 };
64
65 led-4 {
66 function = LED_FUNCTION_WLAN;
67 label = "blue:smart";
68 gpios = <&tlmm 22 GPIO_ACTIVE_HIGH>;
69 linux,default-trigger = "phy1tpt";
70 };
71
72 led-5 {
73 label = "red:smart";
74 gpios = <&tlmm 25 GPIO_ACTIVE_HIGH>;
75 };
76
77 resetzwave {
78 label = "resetzwave";
79 gpios = <&tlmm 11 GPIO_ACTIVE_HIGH>;
80 };
81 };
82
83 keys {
84 compatible = "gpio-keys";
85
86 reset {
87 label = "reset";
88 linux,code = <KEY_RESTART>;
89 gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
90 };
91
92 wps {
93 label = "wps";
94 linux,code = <KEY_WPS_BUTTON>;
95 gpios = <&tlmm 68 GPIO_ACTIVE_LOW>;
96 };
97 };
98
99 soc {
100 tcsr@1949000 {
101 compatible = "qcom,tcsr";
102 reg = <0x1949000 0x100>;
103 qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
104 };
105
106 tcsr@194b000 {
107 /* select hostmode */
108 compatible = "qcom,tcsr";
109 reg = <0x194b000 0x100>;
110 qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
111 status = "okay";
112 };
113
114 ess_tcsr@1953000 {
115 compatible = "qcom,tcsr";
116 reg = <0x1953000 0x1000>;
117 qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
118 };
119
120 tcsr@1957000 {
121 compatible = "qcom,tcsr";
122 reg = <0x1957000 0x100>;
123 qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
124 };
125 };
126 };
127
128 &watchdog {
129 status = "okay";
130 };
131
132 &prng {
133 status = "okay";
134 };
135
136 &crypto {
137 status = "okay";
138 };
139
140 &blsp_dma {
141 status = "okay";
142 };
143
144 &blsp1_spi1 {
145 pinctrl-0 = <&spi_0_pins>;
146 pinctrl-names = "default";
147 status = "okay";
148 cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
149
150 flash@0 {
151 /* u-boot is looking for "n25q128a11" property */
152 compatible = "jedec,spi-nor", "n25q128a11";
153 #address-cells = <1>;
154 #size-cells = <1>;
155 reg = <0>;
156 spi-max-frequency = <24000000>;
157
158 partitions {
159 compatible = "fixed-partitions";
160 #address-cells = <1>;
161 #size-cells = <1>;
162
163 partition@0 {
164 label = "0:SBL1";
165 reg = <0x0 0x40000>;
166 read-only;
167 };
168
169 partition@40000 {
170 label = "0:MIBIB";
171 reg = <0x40000 0x20000>;
172 read-only;
173 };
174
175 partition@60000 {
176 label = "0:QSEE";
177 reg = <0x60000 0x60000>;
178 read-only;
179 };
180
181 partition@c0000 {
182 label = "0:CDT";
183 reg = <0xc0000 0x10000>;
184 read-only;
185 };
186
187 partition@d0000 {
188 label = "0:DDRPARAMS";
189 reg = <0xd0000 0x10000>;
190 read-only;
191 };
192
193 partition@e0000 {
194 label = "0:APPSBLENV";
195 reg = <0xe0000 0x10000>;
196 read-only;
197 };
198
199 partition@f0000 {
200 label = "0:APPSBL";
201 reg = <0xf0000 0xc0000>;
202 read-only;
203 };
204
205 partition@1b0000 {
206 label = "0:reserved1";
207 reg = <0x1b0000 0x50000>;
208 read-only;
209 };
210 };
211 };
212 };
213
214 &blsp1_uart1 {
215 pinctrl-0 = <&serial_pins>;
216 pinctrl-names = "default";
217 status = "okay";
218 };
219
220 &cryptobam {
221 status = "okay";
222 };
223
224 &mdio {
225 status = "okay";
226 pinctrl-0 = <&mdio_pins>;
227 pinctrl-names = "default";
228 reset-gpios = <&tlmm 47 GPIO_ACTIVE_LOW>;
229 reset-delay-us = <2000>;
230 };
231
232 &gmac {
233 status = "okay";
234 nvmem-cell-names = "mac-address";
235 nvmem-cells = <&macaddr_config_0 0>;
236 };
237
238 &switch {
239 status = "okay";
240 };
241
242 &swport2 {
243 status = "okay";
244
245 label = "wan";
246
247 nvmem-cell-names = "mac-address";
248 nvmem-cells = <&macaddr_config_0 1>;
249 };
250
251 &swport3 {
252 status = "okay";
253
254 label = "lan";
255 };
256
257 &nand {
258 pinctrl-0 = <&nand_pins>;
259 pinctrl-names = "default";
260 status = "okay";
261
262 nand@0 {
263 partitions {
264 compatible = "fixed-partitions";
265 #address-cells = <1>;
266 #size-cells = <1>;
267
268 partition@0 {
269 label = "fota-flag";
270 reg = <0x0 0xa0000>;
271 read-only;
272 };
273
274 partition@a0000 {
275 label = "ART";
276 reg = <0xa0000 0x80000>;
277 read-only;
278
279 nvmem-layout {
280 compatible = "fixed-layout";
281 #address-cells = <1>;
282 #size-cells = <1>;
283
284 precal_art_1000: precal@1000 {
285 reg = <0x1000 0x2f20>;
286 };
287
288 precal_art_9000: precal@9000 {
289 reg = <0x9000 0x2f20>;
290 };
291 };
292 };
293
294 partition@120000 {
295 label = "mac";
296 reg = <0x120000 0x80000>;
297 read-only;
298
299 nvmem-layout {
300 compatible = "fixed-layout";
301 #address-cells = <1>;
302 #size-cells = <1>;
303
304 macaddr_config_0: macaddr@0 {
305 compatible = "mac-base";
306 reg = <0x0 0x6>;
307 #nvmem-cell-cells = <1>;
308 };
309 };
310 };
311
312 partition@1a0000 {
313 label = "reserved2";
314 reg = <0x1a0000 0xc0000>;
315 read-only;
316 };
317
318 partition@260000 {
319 label = "cfg-param";
320 reg = <0x260000 0x400000>;
321 read-only;
322 };
323
324 partition@660000 {
325 label = "log";
326 reg = <0x660000 0x400000>;
327 };
328
329 partition@a60000 {
330 label = "oops";
331 reg = <0xa60000 0xa0000>;
332 };
333
334 partition@b00000 {
335 label = "reserved3";
336 reg = <0xb00000 0x500000>;
337 read-only;
338 };
339
340 partition@1000000 {
341 label = "web";
342 reg = <0x1000000 0x800000>;
343 };
344
345 partition@1800000 {
346 label = "rootfs";
347 reg = <0x1800000 0x1d00000>;
348 };
349
350 partition@3500000 {
351 label = "data";
352 reg = <0x3500000 0x1900000>;
353 };
354
355 partition@4e00000 {
356 label = "fota";
357 reg = <0x4e00000 0x2800000>;
358
359 };
360 partition@7600000 {
361 label = "iot-db";
362 reg = <0x7600000 0xa00000>;
363 };
364 };
365 };
366 };
367
368 &qpic_bam {
369 status = "okay";
370 };
371
372 &tlmm {
373 i2c_0_pins: i2c_0_pinmux {
374 mux {
375 pins = "gpio20", "gpio21";
376 function = "blsp_i2c0";
377 bias-disable;
378 };
379 };
380
381 mdio_pins: mdio_pinmux {
382 mux_1 {
383 pins = "gpio6";
384 function = "mdio";
385 bias-pull-up;
386 };
387
388 mux_2 {
389 pins = "gpio7";
390 function = "mdc";
391 bias-pull-up;
392 };
393 };
394
395 nand_pins: nand_pins {
396 pullups {
397 pins = "gpio52", "gpio53", "gpio58",
398 "gpio59";
399 function = "qpic";
400 bias-pull-up;
401 };
402
403 pulldowns {
404 pins = "gpio54", "gpio55", "gpio56",
405 "gpio57", "gpio60",
406 "gpio62", "gpio63", "gpio64",
407 "gpio65", "gpio66", "gpio67",
408 "gpio69";
409 function = "qpic";
410 bias-pull-down;
411 };
412 };
413
414 serial_pins: serial_pinmux {
415 mux {
416 pins = "gpio16", "gpio17";
417 function = "blsp_uart0";
418 bias-disable;
419 };
420 };
421
422 spi_0_pins: spi_0_pinmux {
423 pinmux {
424 function = "blsp_spi0";
425 pins = "gpio13", "gpio14", "gpio15";
426 drive-strength = <12>;
427 bias-disable;
428 };
429
430 pinmux_cs {
431 function = "gpio";
432 pins = "gpio12";
433 drive-strength = <2>;
434 bias-disable;
435 output-high;
436 };
437 };
438 };
439
440 &usb2_hs_phy {
441 status = "okay";
442 };
443
444 &usb2 {
445 status = "okay";
446 };
447
448 &usb3_ss_phy {
449 status = "okay";
450 };
451
452 &usb3_hs_phy {
453 status = "okay";
454 };
455
456 &usb3 {
457 status = "okay";
458 };
459
460 &wifi0 {
461 status = "okay";
462 nvmem-cell-names = "pre-calibration", "mac-address";
463 nvmem-cells = <&precal_art_1000>, <&macaddr_config_0 2>;
464 qcom,ath10k-calibration-variant = "ZTE-MF18A";
465 };
466
467 //* This node is used for 5Ghz on QCA9982 */
468 &pcie0 {
469 status = "okay";
470 perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
471 wake-gpio = <&tlmm 40 GPIO_ACTIVE_LOW>;
472 clkreq-gpio = <&tlmm 39 GPIO_ACTIVE_LOW>;
473
474 bridge@0,0 {
475 reg = <0x00000000 0 0 0 0>;
476 #address-cells = <3>;
477 #size-cells = <2>;
478 ranges;
479
480 wifi2: wifi@1,0 {
481 compatible = "pci168c,0040";
482 nvmem-cell-names = "pre-calibration", "mac-address";
483 nvmem-cells = <&precal_art_9000>, <&macaddr_config_0 3>;
484 qcom,ath10k-calibration-variant = "ZTE-MF18A";
485 reg = <0x00010000 0 0 0 0>;
486 };
487 };
488 };
489
490