target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-habanero-dvk.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2 /* Copyright (c) 2019, Robert Marko <robimarko@gmail.com> */
   3
   4 #include "qcom-ipq4019.dtsi"
   5 #include <dt-bindings/gpio/gpio.h>
   6 #include <dt-bindings/input/input.h>
   7 #include <dt-bindings/leds/common.h>
   8 #include <dt-bindings/soc/qcom,tcsr.h>
   9
  10 / {
  11         model = "8devices Habanero DVK";
  12         compatible = "8dev,habanero-dvk";
  13
  14         aliases {
  15                 led-boot = &led_status;
  16                 led-failsafe = &led_status;
  17                 led-running = &led_status;
  18                 led-upgrade = &led_upgrade;
  19                 ethernet1 = &swport5;
  20         };
  21
  22         soc {
  23                 rng@22000 {
  24                         status = "okay";
  25                 };
  26
  27                 mdio@90000 {
  28                         status = "okay";
  29
  30                         pinctrl-0 = <&mdio_pins>;
  31                         pinctrl-names = "default";
  32                 };
  33
  34                 counter@4a1000 {
  35                         compatible = "qcom,qca-gcnt";
  36                         reg = <0x4a1000 0x4>;
  37                 };
  38
  39                 tcsr@1949000 {
  40                         compatible = "qcom,tcsr";
  41                         reg = <0x1949000 0x100>;
  42                         qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
  43                 };
  44
  45                 tcsr@194b000 {
  46                         status = "okay";
  47
  48                         compatible = "qcom,tcsr";
  49                         reg = <0x194b000 0x100>;
  50                         qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
  51                 };
  52
  53                 ess_tcsr@1953000 {
  54                         compatible = "qcom,tcsr";
  55                         reg = <0x1953000 0x1000>;
  56                         qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
  57                 };
  58
  59                 tcsr@1957000 {
  60                         compatible = "qcom,tcsr";
  61                         reg = <0x1957000 0x100>;
  62                         qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
  63                 };
  64
  65                 crypto@8e3a000 {
  66                         status = "okay";
  67                 };
  68
  69                 watchdog@b017000 {
  70                         status = "okay";
  71                 };
  72         };
  73
  74         keys {
  75                 compatible = "gpio-keys";
  76
  77                 reset {
  78                         label = "reset";
  79                         gpios = <&tlmm 8 GPIO_ACTIVE_LOW>;
  80                         linux,code = <KEY_RESTART>;
  81                 };
  82         };
  83
  84         leds {
  85                 compatible = "gpio-leds";
  86
  87                 led_status: status {
  88                         function = LED_FUNCTION_STATUS;
  89                         color = <LED_COLOR_ID_GREEN>;
  90                         gpios = <&tlmm 37 GPIO_ACTIVE_HIGH>;
  91                         panic-indicator;
  92                 };
  93
  94                 led_upgrade: upgrade {
  95                         label = "green:upgrade";
  96                         gpios = <&tlmm 40 GPIO_ACTIVE_HIGH>;
  97                 };
  98
  99                 wlan2g {
 100                         label = "green:wlan2g";
 101                         gpios = <&tlmm 46 GPIO_ACTIVE_HIGH>;
 102                         linux,default-trigger = "phy0tpt";
 103                 };
 104
 105                 wlan5g {
 106                         label = "green:wlan5g";
 107                         gpios = <&tlmm 48 GPIO_ACTIVE_HIGH>;
 108                         linux,default-trigger = "phy1tpt";
 109                 };
 110         };
 111 };
 112
 113 &vqmmc {
 114         status = "okay";
 115 };
 116
 117 &sdhci {
 118         status = "okay";
 119
 120         pinctrl-0 = <&sd_pins>;
 121         pinctrl-names = "default";
 122         cd-gpios = <&tlmm 22 GPIO_ACTIVE_LOW>;
 123         vqmmc-supply = <&vqmmc>;
 124 };
 125
 126 &qpic_bam {
 127         status = "okay";
 128 };
 129
 130 &tlmm {
 131         mdio_pins: mdio_pinmux {
 132                 mux_1 {
 133                         pins = "gpio6";
 134                         function = "mdio";
 135                         bias-pull-up;
 136                 };
 137
 138                 mux_2 {
 139                         pins = "gpio7";
 140                         function = "mdc";
 141                         bias-pull-up;
 142                 };
 143         };
 144
 145         serial_pins: serial_pinmux {
 146                 mux {
 147                         pins = "gpio16", "gpio17";
 148                         function = "blsp_uart0";
 149                         bias-disable;
 150                 };
 151         };
 152
 153         spi_0_pins: spi_0_pinmux {
 154                 pinmux {
 155                         function = "blsp_spi0";
 156                         pins = "gpio13", "gpio14", "gpio15";
 157                         drive-strength = <12>;
 158                         bias-disable;
 159                 };
 160
 161                 pinmux_cs {
 162                         function = "gpio";
 163                         pins = "gpio12";
 164                         drive-strength = <2>;
 165                         bias-disable;
 166                         output-high;
 167                 };
 168         };
 169
 170         nand_pins: nand_pins {
 171                 pullups {
 172                         pins =  "gpio52", "gpio53", "gpio58", "gpio59";
 173                         function = "qpic";
 174                         bias-pull-up;
 175                 };
 176
 177                 pulldowns {
 178                         pins = "gpio54", "gpio55", "gpio56", "gpio57",
 179                                 "gpio60", "gpio62", "gpio63", "gpio64",
 180                                 "gpio65", "gpio66", "gpio67", "gpio68",
 181                                 "gpio69";
 182                         function = "qpic";
 183                         bias-pull-down;
 184                 };
 185         };
 186
 187         sd_pins: sd_pins {
 188                 pinmux {
 189                         function = "sdio";
 190                         pins = "gpio23", "gpio24", "gpio25", "gpio26",
 191                                 "gpio28", "gpio29", "gpio30", "gpio31";
 192                         drive-strength = <10>;
 193                 };
 194
 195                 pinmux_sd_clk {
 196                         function = "sdio";
 197                         pins = "gpio27";
 198                         drive-strength = <16>;
 199                 };
 200
 201                 pinmux_sd7 {
 202                         function = "sdio";
 203                         pins = "gpio32";
 204                         drive-strength = <10>;
 205                         bias-disable;
 206                 };
 207         };
 208 };
 209
 210 &blsp_dma {
 211         status = "okay";
 212 };
 213
 214 &blsp1_spi1 {
 215         status = "okay";
 216
 217         pinctrl-0 = <&spi_0_pins>;
 218         pinctrl-names = "default";
 219         cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
 220
 221         flash@0 {
 222                 compatible = "jedec,spi-nor";
 223                 spi-max-frequency = <24000000>;
 224                 reg = <0>;
 225
 226                 partitions {
 227                         compatible = "fixed-partitions";
 228                         #address-cells = <1>;
 229                         #size-cells = <1>;
 230
 231                         partition@0 {
 232                                 label = "SBL1";
 233                                 reg = <0x00000000 0x00040000>;
 234                                 read-only;
 235                         };
 236                         partition@40000 {
 237                                 label = "MIBIB";
 238                                 reg = <0x00040000 0x00020000>;
 239                                 read-only;
 240                         };
 241                         partition@60000 {
 242                                 label = "QSEE";
 243                                 reg = <0x00060000 0x00060000>;
 244                                 read-only;
 245                         };
 246                         partition@c0000 {
 247                                 label = "CDT";
 248                                 reg = <0x000c0000 0x00010000>;
 249                                 read-only;
 250                         };
 251                         partition@d0000 {
 252                                 label = "DDRPARAMS";
 253                                 reg = <0x000d0000 0x00010000>;
 254                                 read-only;
 255                         };
 256                         partition@e0000 {
 257                                 label = "APPSBLENV"; /* uboot env */
 258                                 reg = <0x000e0000 0x00010000>;
 259                                 read-only;
 260                         };
 261                         partition@f0000 {
 262                                 label = "APPSBL"; /* uboot */
 263                                 reg = <0x000f0000 0x00080000>;
 264                                 read-only;
 265                         };
 266                         partition@170000 {
 267                                 label = "ART";
 268                                 reg = <0x00170000 0x00010000>;
 269                                 read-only;
 270
 271                                 nvmem-layout {
 272                                         compatible = "fixed-layout";
 273                                         #address-cells = <1>;
 274                                         #size-cells = <1>;
 275
 276                                         precal_art_1000: precal@1000 {
 277                                                 reg = <0x1000 0x2f20>;
 278                                         };
 279
 280                                         precal_art_5000: precal@5000 {
 281                                                 reg = <0x5000 0x2f20>;
 282                                         };
 283                                 };
 284                         };
 285                         partition@180000 {
 286                                 label = "cfg";
 287                                 reg = <0x00180000 0x00040000>;
 288                         };
 289                         partition@1c0000 {
 290                                 label = "firmware";
 291                                 compatible = "denx,fit";
 292                                 reg = <0x001c0000 0x01e40000>;
 293                         };
 294                 };
 295         };
 296 };
 297
 298 /* Some DVK boards ship without NAND */
 299 &nand {
 300         status = "okay";
 301
 302         pinctrl-0 = <&nand_pins>;
 303         pinctrl-names = "default";
 304 };
 305
 306 &blsp1_uart1 {
 307         status = "okay";
 308
 309         pinctrl-0 = <&serial_pins>;
 310         pinctrl-names = "default";
 311 };
 312
 313 &cryptobam {
 314         status = "okay";
 315 };
 316
 317 &pcie0 {
 318         status = "okay";
 319
 320         perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
 321         wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>;
 322
 323         /* Free slot for use */
 324         bridge@0,0 {
 325                 reg = <0x00000000 0 0 0 0>;
 326                 #address-cells = <3>;
 327                 #size-cells = <2>;
 328                 ranges;
 329         };
 330 };
 331
 332 &gmac {
 333         status = "okay";
 334 };
 335
 336 &switch {
 337         status = "okay";
 338 };
 339
 340 &swport1 {
 341         status = "okay";
 342 };
 343
 344 &swport2 {
 345         status = "okay";
 346 };
 347
 348 &swport3 {
 349         status = "okay";
 350 };
 351
 352 &swport4 {
 353         status = "okay";
 354 };
 355
 356 &swport5 {
 357         status = "okay";
 358 };
 359
 360 &wifi0 {
 361         status = "okay";
 362         nvmem-cell-names = "pre-calibration";
 363         nvmem-cells = <&precal_art_1000>;
 364         qcom,ath10k-calibration-variant = "8devices-Habanero";
 365 };
 366
 367 &wifi1 {
 368         status = "okay";
 369         nvmem-cell-names = "pre-calibration";
 370         nvmem-cells = <&precal_art_5000>;
 371         qcom,ath10k-calibration-variant = "8devices-Habanero";
 372 };
 373
 374 &usb3 {
 375         status = "okay";
 376 };
 377
 378 &usb3_ss_phy {
 379         status = "okay";
 380 };
 381
 382 &usb3_hs_phy {
 383         status = "okay";
 384 };
 385
 386 &usb2 {
 387         status = "okay";
 388 };
 389
 390 &usb2_hs_phy {
 391         status = "okay";
 392 };