1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 #include "qcom-ipq4019.dtsi"
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/leds/common.h>
7 #include <dt-bindings/soc/qcom,tcsr.h>
10 model = "GL.iNet GL-B2200";
11 compatible = "glinet,gl-b2200", "qcom,ipq4019";
14 device_type = "memory";
15 reg = <0x80000000 0x10000000>;
19 bootargs-append = " root=/dev/mmcblk0p2 rw rootwait clk_ignore_unused";
28 compatible = "qcom,tcsr";
29 reg = <0x1949000 0x100>;
30 qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
35 compatible = "qcom,tcsr";
36 reg = <0x194b000 0x100>;
37 qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
42 compatible = "qcom,tcsr";
43 reg = <0x1953000 0x1000>;
44 qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
48 compatible = "qcom,tcsr";
49 reg = <0x1957000 0x100>;
50 qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
55 compatible = "gpio-keys";
59 gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
60 linux,code = <KEY_WPS_BUTTON>;
61 linux,input-type = <1>;
66 gpios = <&tlmm 40 GPIO_ACTIVE_LOW>;
67 linux,code = <KEY_RESTART>;
68 linux,input-type = <1>;
73 compatible = "gpio-leds";
76 function = LED_FUNCTION_POWER;
77 color = <LED_COLOR_ID_BLUE>;
78 gpios = <&tlmm 57 GPIO_ACTIVE_HIGH>;
82 label = "blue:internet";
83 gpios = <&tlmm 60 GPIO_ACTIVE_HIGH>;
86 function = LED_FUNCTION_POWER;
87 color = <LED_COLOR_ID_WHITE>;
88 gpios = <&tlmm 61 GPIO_ACTIVE_LOW>;
91 label = "white:internet";
92 gpios = <&tlmm 66 GPIO_ACTIVE_LOW>;
111 pinctrl-0 = <&sd_pins>;
112 pinctrl-names = "default";
113 cd-gpios = <&tlmm 3 GPIO_ACTIVE_LOW>;
114 vqmmc-supply = <&vqmmc>;
126 pinctrl-0 = <&spi_0_pins>;
127 pinctrl-names = "default";
129 cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
132 compatible = "jedec,spi-nor";
134 spi-max-frequency = <24000000>;
137 compatible = "fixed-partitions";
138 #address-cells = <1>;
149 reg = <0x40000 0x20000>;
155 reg = <0x60000 0x60000>;
161 reg = <0xc0000 0x10000>;
167 reg = <0xd0000 0x10000>;
173 reg = <0xe0000 0x10000>;
179 reg = <0xf0000 0x80000>;
185 reg = <0x170000 0x10000>;
189 compatible = "fixed-layout";
190 #address-cells = <1>;
193 precal_art_1000: precal@1000 {
194 reg = <0x1000 0x2f20>;
197 precal_art_5000: precal@5000 {
198 reg = <0x5000 0x2f20>;
201 precal_art_9000: precal@9000 {
202 reg = <0x9000 0x2f20>;
211 pinctrl-0 = <&spi_1_pins>;
212 pinctrl-names = "default";
216 compatible = "silabs,si3210";
218 spi-max-frequency = <24000000>;
223 pinctrl-0 = <&serial_pins>;
224 pinctrl-names = "default";
229 pinctrl-0 = <&serial_1_pins>;
230 pinctrl-names = "default";
235 serial_pins: serial_pinmux {
237 pins = "gpio16", "gpio17";
238 function = "blsp_uart0";
243 serial_1_pins: serial1_pinmux {
245 pins = "gpio8", "gpio9",
247 function = "blsp_uart1";
252 spi_0_pins: spi_0_pinmux {
254 function = "blsp_spi0";
255 pins = "gpio13", "gpio14", "gpio15";
262 pins = "gpio13", "gpio14", "gpio15";
263 drive-strength = <12>;
268 drive-strength = <2>;
274 spi_1_pins: spi_1_pinmux {
276 pins = "gpio44", "gpio46", "gpio47";
277 function = "blsp_spi1";
310 pins = "gpio23", "gpio24", "gpio25", "gpio26",
311 "gpio29", "gpio30", "gpio31", "gpio32";
312 drive-strength = <10>;
318 drive-strength = <16>;
324 drive-strength = <10>;
333 perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
334 wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>;
337 reg = <0x00000000 0 0 0 0>;
338 #address-cells = <3>;
344 /* Bootlog shows this is a 168c:0056 - QCA 9888v2 */
345 compatible = "qcom,ath10k";
346 reg = <0x00010000 0 0 0 0>;
347 nvmem-cell-names = "pre-calibration";
348 nvmem-cells = <&precal_art_9000>;
349 qcom,ath10k-calibration-variant = "GL-B2200";
350 ieee80211-freq-limit = <5450000 5900000>;
381 nvmem-cell-names = "pre-calibration";
382 nvmem-cells = <&precal_art_1000>;
383 qcom,ath10k-calibration-variant = "GL-B2200";
388 nvmem-cell-names = "pre-calibration";
389 nvmem-cells = <&precal_art_5000>;
390 qcom,ath10k-calibration-variant = "GL-B2200";
391 ieee80211-freq-limit = <5100000 5400000>;