ipq40xx: switch default to 6.6
[openwrt/staging/pepe2k.git] / target / linux / ipq40xx / files-6.1 / arch / arm / boot / dts / qcom-ipq4019-habanero-dvk.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 /* Copyright (c) 2019, Robert Marko <robimarko@gmail.com> */
3
4 #include "qcom-ipq4019.dtsi"
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/leds/common.h>
8 #include <dt-bindings/soc/qcom,tcsr.h>
9
10 / {
11 model = "8devices Habanero DVK";
12 compatible = "8dev,habanero-dvk";
13
14 aliases {
15 led-boot = &led_status;
16 led-failsafe = &led_status;
17 led-running = &led_status;
18 led-upgrade = &led_upgrade;
19 ethernet1 = &swport5;
20 };
21
22 soc {
23 rng@22000 {
24 status = "okay";
25 };
26
27 mdio@90000 {
28 status = "okay";
29
30 pinctrl-0 = <&mdio_pins>;
31 pinctrl-names = "default";
32 };
33
34 counter@4a1000 {
35 compatible = "qcom,qca-gcnt";
36 reg = <0x4a1000 0x4>;
37 };
38
39 tcsr@1949000 {
40 compatible = "qcom,tcsr";
41 reg = <0x1949000 0x100>;
42 qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
43 };
44
45 tcsr@194b000 {
46 status = "okay";
47
48 compatible = "qcom,tcsr";
49 reg = <0x194b000 0x100>;
50 qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
51 };
52
53 ess_tcsr@1953000 {
54 compatible = "qcom,tcsr";
55 reg = <0x1953000 0x1000>;
56 qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
57 };
58
59 tcsr@1957000 {
60 compatible = "qcom,tcsr";
61 reg = <0x1957000 0x100>;
62 qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
63 };
64
65 usb2: usb2@60f8800 {
66 status = "okay";
67 };
68
69 usb3: usb3@8af8800 {
70 status = "okay";
71 };
72
73 crypto@8e3a000 {
74 status = "okay";
75 };
76
77 watchdog@b017000 {
78 status = "okay";
79 };
80 };
81
82 keys {
83 compatible = "gpio-keys";
84
85 reset {
86 label = "reset";
87 gpios = <&tlmm 8 GPIO_ACTIVE_LOW>;
88 linux,code = <KEY_RESTART>;
89 };
90 };
91
92 leds {
93 compatible = "gpio-leds";
94
95 led_status: status {
96 function = LED_FUNCTION_STATUS;
97 color = <LED_COLOR_ID_GREEN>;
98 gpios = <&tlmm 37 GPIO_ACTIVE_HIGH>;
99 panic-indicator;
100 };
101
102 led_upgrade: upgrade {
103 label = "green:upgrade";
104 gpios = <&tlmm 40 GPIO_ACTIVE_HIGH>;
105 };
106
107 wlan2g {
108 label = "green:wlan2g";
109 gpios = <&tlmm 46 GPIO_ACTIVE_HIGH>;
110 linux,default-trigger = "phy0tpt";
111 };
112
113 wlan5g {
114 label = "green:wlan5g";
115 gpios = <&tlmm 48 GPIO_ACTIVE_HIGH>;
116 linux,default-trigger = "phy1tpt";
117 };
118 };
119 };
120
121 &vqmmc {
122 status = "okay";
123 };
124
125 &sdhci {
126 status = "okay";
127
128 pinctrl-0 = <&sd_pins>;
129 pinctrl-names = "default";
130 cd-gpios = <&tlmm 22 GPIO_ACTIVE_LOW>;
131 vqmmc-supply = <&vqmmc>;
132 };
133
134 &qpic_bam {
135 status = "okay";
136 };
137
138 &tlmm {
139 mdio_pins: mdio_pinmux {
140 mux_1 {
141 pins = "gpio6";
142 function = "mdio";
143 bias-pull-up;
144 };
145
146 mux_2 {
147 pins = "gpio7";
148 function = "mdc";
149 bias-pull-up;
150 };
151 };
152
153 serial_pins: serial_pinmux {
154 mux {
155 pins = "gpio16", "gpio17";
156 function = "blsp_uart0";
157 bias-disable;
158 };
159 };
160
161 spi_0_pins: spi_0_pinmux {
162 pinmux {
163 function = "blsp_spi0";
164 pins = "gpio13", "gpio14", "gpio15";
165 drive-strength = <12>;
166 bias-disable;
167 };
168
169 pinmux_cs {
170 function = "gpio";
171 pins = "gpio12";
172 drive-strength = <2>;
173 bias-disable;
174 output-high;
175 };
176 };
177
178 nand_pins: nand_pins {
179 pullups {
180 pins = "gpio52", "gpio53", "gpio58", "gpio59";
181 function = "qpic";
182 bias-pull-up;
183 };
184
185 pulldowns {
186 pins = "gpio54", "gpio55", "gpio56", "gpio57",
187 "gpio60", "gpio62", "gpio63", "gpio64",
188 "gpio65", "gpio66", "gpio67", "gpio68",
189 "gpio69";
190 function = "qpic";
191 bias-pull-down;
192 };
193 };
194
195 sd_pins: sd_pins {
196 pinmux {
197 function = "sdio";
198 pins = "gpio23", "gpio24", "gpio25", "gpio26",
199 "gpio28", "gpio29", "gpio30", "gpio31";
200 drive-strength = <10>;
201 };
202
203 pinmux_sd_clk {
204 function = "sdio";
205 pins = "gpio27";
206 drive-strength = <16>;
207 };
208
209 pinmux_sd7 {
210 function = "sdio";
211 pins = "gpio32";
212 drive-strength = <10>;
213 bias-disable;
214 };
215 };
216 };
217
218 &blsp_dma {
219 status = "okay";
220 };
221
222 &blsp1_spi1 {
223 status = "okay";
224
225 pinctrl-0 = <&spi_0_pins>;
226 pinctrl-names = "default";
227 cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
228
229 flash@0 {
230 compatible = "jedec,spi-nor";
231 spi-max-frequency = <24000000>;
232 reg = <0>;
233
234 partitions {
235 compatible = "fixed-partitions";
236 #address-cells = <1>;
237 #size-cells = <1>;
238
239 partition@0 {
240 label = "SBL1";
241 reg = <0x00000000 0x00040000>;
242 read-only;
243 };
244 partition@40000 {
245 label = "MIBIB";
246 reg = <0x00040000 0x00020000>;
247 read-only;
248 };
249 partition@60000 {
250 label = "QSEE";
251 reg = <0x00060000 0x00060000>;
252 read-only;
253 };
254 partition@c0000 {
255 label = "CDT";
256 reg = <0x000c0000 0x00010000>;
257 read-only;
258 };
259 partition@d0000 {
260 label = "DDRPARAMS";
261 reg = <0x000d0000 0x00010000>;
262 read-only;
263 };
264 partition@e0000 {
265 label = "APPSBLENV"; /* uboot env */
266 reg = <0x000e0000 0x00010000>;
267 read-only;
268 };
269 partition@f0000 {
270 label = "APPSBL"; /* uboot */
271 reg = <0x000f0000 0x00080000>;
272 read-only;
273 };
274 partition@170000 {
275 label = "ART";
276 reg = <0x00170000 0x00010000>;
277 read-only;
278
279 nvmem-layout {
280 compatible = "fixed-layout";
281 #address-cells = <1>;
282 #size-cells = <1>;
283
284 precal_art_1000: precal@1000 {
285 reg = <0x1000 0x2f20>;
286 };
287
288 precal_art_5000: precal@5000 {
289 reg = <0x5000 0x2f20>;
290 };
291 };
292 };
293 partition@180000 {
294 label = "cfg";
295 reg = <0x00180000 0x00040000>;
296 };
297 partition@1c0000 {
298 label = "firmware";
299 compatible = "denx,fit";
300 reg = <0x001c0000 0x01e40000>;
301 };
302 };
303 };
304 };
305
306 /* Some DVK boards ship without NAND */
307 &nand {
308 status = "okay";
309
310 pinctrl-0 = <&nand_pins>;
311 pinctrl-names = "default";
312 };
313
314 &blsp1_uart1 {
315 status = "okay";
316
317 pinctrl-0 = <&serial_pins>;
318 pinctrl-names = "default";
319 };
320
321 &cryptobam {
322 status = "okay";
323 };
324
325 &pcie0 {
326 status = "okay";
327
328 perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
329 wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>;
330
331 /* Free slot for use */
332 bridge@0,0 {
333 reg = <0x00000000 0 0 0 0>;
334 #address-cells = <3>;
335 #size-cells = <2>;
336 ranges;
337 };
338 };
339
340 &gmac {
341 status = "okay";
342 };
343
344 &switch {
345 status = "okay";
346 };
347
348 &swport1 {
349 status = "okay";
350 };
351
352 &swport2 {
353 status = "okay";
354 };
355
356 &swport3 {
357 status = "okay";
358 };
359
360 &swport4 {
361 status = "okay";
362 };
363
364 &swport5 {
365 status = "okay";
366 };
367
368 &wifi0 {
369 status = "okay";
370 nvmem-cell-names = "pre-calibration";
371 nvmem-cells = <&precal_art_1000>;
372 qcom,ath10k-calibration-variant = "8devices-Habanero";
373 };
374
375 &wifi1 {
376 status = "okay";
377 nvmem-cell-names = "pre-calibration";
378 nvmem-cells = <&precal_art_5000>;
379 qcom,ath10k-calibration-variant = "8devices-Habanero";
380 };
381
382 &usb3_ss_phy {
383 status = "okay";
384 };
385
386 &usb3_hs_phy {
387 status = "okay";
388 };
389
390 &usb2_hs_phy {
391 status = "okay";
392 };